Texas Instruments SN74HC573AN Handleiding


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SNx4HC573A Octal Transparent D-Type Latches With 3-State Outputs
1 Features
• Wide Operating Voltage Range from 2 V to 6 V
• High-Current 3-State Outputs Drive Bus Lines
Directly up to 15 LSTTL Loads
• Low Power Consumption: 80-µA Maximum ICC
• Typical tpd = 21 ns
• ±6-mA Output Drive at 5 V
• Low Input Current: 1 µA (Maximum)
• Bus-Structured Pinout
2 Applications
• Buffer Registers
• Bidirectional Bus Drivers
• Working Registers
3 Description
The SNx4HC573A devices are octal transparent
D-type latches that feature 3-state outputs designed
specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable
for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the
Q outputs respond to the data (D) inputs. When LE is
low, the outputs are latched to retain the data that was
set up.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN54HC573AJ CDIP (20) 26.92 mm × 6.92 mm
SN54HC573AW CFP (20) 13.72 mm × 6.92 mm
SN54HC573AFK LCCC (20) 8.89 mm × 8.89 mm
SN74HC573AN PDIP (20) 25.40 mm × 6.35 mm
SN74HC573ADW SOIC (20) 12.80 mm × 7.50 mm
SN74HC573ADB SSOP (20) 7.20 mm × 5.30 mm
SN74HC573APW TSSOP (20) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
OE
LE
1D
1Q
1
11
2
19
To Seven Other Channels
C1
1D
Copyright © 2016, Texas Instruments Incorporated
Logic Diagram (Positive Logic)
SN54HC573A, SN74HC573A
SCLS147G – DECEMBER 1982 – REVISED APRIL 2022
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
Pin Functions.................................................................... 3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................5
6.6 Timing Requirements.................................................. 6
6.7 Switching Characteristics............................................7
6.8 Typical Characteristics................................................9
7 Parameter Measurement Information.......................... 10
8 Detailed Description...................................................... 11
8.1 Overview................................................................... 11
8.2 Functional Block Diagram......................................... 11
8.3 Feature Description...................................................11
8.4 Device Functional Modes..........................................11
9 Application and Implementation.................................. 12
9.1 Application Information............................................. 12
9.2 Typical Application.................................................... 12
10 Power Supply Recommendations..............................13
11 Layout........................................................................... 14
11.1 Layout Guidelines................................................... 14
11.2 Layout Example...................................................... 14
12 Device and Documentation Support..........................15
12.1 Documentation Support.......................................... 15
12.2 Related Links.......................................................... 15
12.3 Receiving Notification of Documentation Updates..15
12.4 Support Resources................................................. 15
12.5 Trademarks.............................................................15
12.6 Electrostatic Discharge Caution..............................15
12.7 Glossary..................................................................15
13 Mechanical, Packaging, and Orderable
Information.................................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (September 2003) to Revision F (October 2016) Page
• Added table, section, , ESD Ratings Feature Description Device Functional Modes Application and
Implementation Power Supply Recommendations Layout Device and section, section, section,
Documentation Support Mechanical, Packaging, and Orderable Information section, and section................... 1
• Deleted Ordering Information table; see POA at the end of the data sheet....................................................... 1
• Changed Package thermal impedance, RθJA, values from 70 to 92.5 (DB), from 58 to 78.3 (DW), from 69 to
49.1 (N), and from 83 to 101.1 (PW).................................................................................................................. 5
Changes from Revision F (October 2016) to Revision G (April 2022) Page
• Updated ESD ratings table to modern TI standards...........................................................................................4
• Changed Package thermal impedance, RθJA, values from 92.5 to 122.7 (DB), from 78.3 to 109.1 (DW), from
49.1 to 84.6 (N), and from 101.1 to 131.8 (PW)................................................................................................. 5
SN54HC573A, SN74HC573A
SCLS147G – DECEMBER 1982 – REVISED APRIL 2022 www.ti.com
2Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: SN54HC573A SN74HC573A
5 Pin Configuration and Functions
DB, DW, J, N, PW, or W Packages
20-Pin SSOP, SOIC, CDIP, PDIP, TSSOP, or CFP
Top View
FK Package
20-Pin LCCC
Top View
Pin Functions
PIN I/O(1) DESCRIPTION
NO. NAME
1 OE I Output enable
2 1D I 1D input
3 2D I 2D input
4 3D I 3D input
5 4D I 4D input
6 5D I 5D input
7 6D I 6D input
8 7D I 7D input
9 8D I 8D input
10 GND — Ground
11 LE I Latch enable input
12 8Q O 8Q output
13 7Q O 7Q output
14 6Q O 6Q output
15 5Q O 5Q output
16 4Q O 4Q output
17 3Q O 3Q output
18 2Q O 2Q output
19 1Q O 1Q output
20 VCC — Power pin
(1) Signal Types: I = Input, O = Output, I/O = Input or Output.
www.ti.com
SN54HC573A, SN74HC573A
SCLS147G – DECEMBER 1982 – REVISED APRIL 2022
Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3
Product Folder Links: SN54HC573A SN74HC573A


Product specificaties

Merk: Texas Instruments
Categorie: Niet gecategoriseerd
Model: SN74HC573AN
Breedte: 26.92 mm
Diepte: 6.6 mm
Hoogte: 4.57 mm
Breedte verpakking: 13.97 mm
Diepte verpakking: 506 mm
Hoogte verpakking: 11.23 mm
Soort: Logic IC
Type verpakking: PDIP
Aantal per verpakking: 20 stuk(s)
Temperatuur bij opslag: -65 - 150 °C
Bedrijfstemperatuur (T-T): -40 - 85 °C
Aantal pinnen: 20
Breedte (met pennen): 26.92 mm
Diepte (met pennen): 10.92 mm
Hoogte (met pennen): 8.26 mm

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