Texas Instruments CD74HCT390E Handleiding


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CD74HC390, CDx4HCT390 High-Speed CMOS Logic Dual Decade Ripple Counter
1 Features
• Two BCD decade or bi-quinary counters
• One package can be configured to divide-by-2, 4,
5, 10, 20, 25, 50, 100
• Two controller reset inputs to clear each decade
counter individually
• Fanout (over temperature range)
– Standard outputs: 10 LSTTL loads
– Bus driver outputs: 15 LSTTL loads
• Wide operating temperature range: -55°C to 125°C
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL
logic ICs
• HC types
– 2V to 6V operation
– High noise immunity: NIL = 30%, NIH = 30% of
VCC at VCC = 5V
• HCT types
– 4.5 V to 5.5 V operation
– Direct LSTTL input logic compatibility, VIL = 0.8
V (max), VIH = 2 V (min)
– CMOS input compatibility, II ≤ 1 μA at VOL, VOH
2 Description
The SN74HC390 and ‘HCT390 devices include two
independent 4-bit decade ripple counters, falling-edge
clocked with asynchronous clear. Each counter is
divided into two sections, a divide-by-2 and divide-
by-5 counter, each of which has an independent clock
input. This allows for very flexible configuration of the
device.
Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
CD54HCT390F3A CDIP (16) 24.38 mm × 6.92 mm
CD74HC390M SOIC (16) 9.90 mm × 3.90 mm
CD74HCT390M SOIC (16) 9.90 mm × 3.90 mm
CD74HC390E PDIP (16) 19.31 mm × 6.35 mm
CD74HCT390E PDIP (16) 19.31 mm × 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
nCLKA
nCLR
2QA2Q B2QC2QD
R R R
QQ
Q
Q
R
VCC = 16
GND = 8
nCLKB
Functional Block Diagram
CD74HC390, CD54HCT390, CD74HCT390
SCHS185E – SEPTEMBER 1997 – REVISED APRIL 2022
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Table of Contents
1 Features............................................................................1
2 Description.......................................................................1
3 Revision History.............................................................. 2
4 Pin Configuration and Functions...................................3
5 Specifications.................................................................. 4
5.1 Absolute Maximum Ratings........................................ 4
5.2 Recommended Operating Conditions(1) ..................... 4
5.3 Thermal Information....................................................4
5.4 Electrical Characteristics.............................................5
5.5 Prerequisite for Switching Characteristics ................. 6
5.6 Switching Characteristics............................................6
6 Parameter Measurement Information............................ 8
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram........................................... 9
7.3 Device Functional Modes..........................................10
8 Power Supply Recommendations................................11
9 Layout............................................................................. 11
9.1 Layout Guidelines..................................................... 11
10 Device and Documentation Support..........................12
10.1 Documentation Support.......................................... 12
10.2 Receiving Notification of Documentation Updates..12
10.3 Support Resources................................................. 12
10.4 Trademarks............................................................. 12
10.5 Electrostatic Discharge Caution..............................12
10.6 Glossary..................................................................12
11 Mechanical, Packaging, and Orderable
Information.................................................................... 12
3 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (November 2021) to Revision E (April 2022) Page
• Corrected table 7-3, QC value 6 from H to L.....................................................................................................10
Changes from Revision C (September 1997) to Revision D (November 2021) Page
• Updated the numbering, formatting, tables, figures, and cross-references throughout the doucment to reflect
modern data sheet standards............................................................................................................................. 1
• Updated pin names to match current TI naming conventions. 1CP0 is now 1CLK A; 1MR is now 1CLR; 1Q0 is
now 1QA; 1CP1 is now 1CLK B; 1Q1 is now 1QB; 1Q2 is now 1QC; 1Q3 is now 1QD; 2Q3 is now 2QD; 2Q2 is
now 2QC; 2Q1 is now 2QB; 2CP1 is now 2CLK B; 2Q0 is now 2QA; 2MR is now 2CLR; 2CP0 is now 2CLK A . 1
CD74HC390, CD54HCT390, CD74HCT390
SCHS185E – SEPTEMBER 1997 – REVISED APRIL 2022 www.ti.com
2Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: CD74HC390 CD54HCT390 CD74HCT390
4 Pin Configuration and Functions
1
2
3
7
4
5
6
14
13
12
8
11
10
9GND
2CLR
2CLK B
2Q B
VCC
15
16
1CLR
1QA
1CLKB
1QB
1Q C
1QD
2CLK A
2Q D
2QC
2Q A
1CLK
A
J, N or D Package
16-Pin CDIP, PDIP, or SOIC
Top View
www.ti.com
CD74HC390, CD54HCT390, CD74HCT390
SCHS185E – SEPTEMBER 1997 – REVISED APRIL 2022
Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3
Product Folder Links: CD74HC390 CD54HCT390 CD74HCT390


Product specificaties

Merk: Texas Instruments
Categorie: Niet gecategoriseerd
Model: CD74HCT390E
Breedte: 19.69 mm
Diepte: 6.6 mm
Hoogte: 4.57 mm
Breedte verpakking: 13.97 mm
Diepte verpakking: 506 mm
Hoogte verpakking: 11.23 mm
Soort: Logic IC
Type verpakking: PDIP
Aantal per verpakking: 25 stuk(s)
Temperatuur bij opslag: -65 - 150 °C
Bedrijfstemperatuur (T-T): -55 - 125 °C
Aantal pinnen: 16
Breedte (met pennen): 19.69 mm
Diepte (met pennen): 10.92 mm
Hoogte (met pennen): 8.26 mm

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