Texas Instruments SN74LVC125AQPWRQ1 Handleiding

Texas Instruments Niet gecategoriseerd SN74LVC125AQPWRQ1

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FEATURES

D OR PW PACKAGE

(TOP VIEW)

1OE

2OE

GND

VCC

4OE

3OE

abc

DESCRIPTION/ORDERING INFORMATION

SN74LVC125A-Q1

www.ti.com

..................................................................................................................................................

QUADRUPLE BUS BUFFER

WITH 3-STATE OUTPUTS

•Qualied for Automotive Applications

•Operates From 1.65 V to 3.6 V –

•° °Specied From – 40 C to 125 C –

•Inputs Accept Voltages to 5.5 V –

•Max t

pd of 4.8 ns at 3.3 V

•Typical V

OLP (Output Ground Bounce) <0.8 V at

VCC = 3.3 V, T

A= 25 C°

•Typical V

OHV (Output V

OH Undershoot) >2 V at

VCC = 3.3 V, T

A= 25 C°

•Latch-Up Performance Exceeds 250 mA

JESD 17

This quadruple bus buer gate is designed for

CC operation.

The SN74LVC125A features independent line

associated output-enable ( OE) input is high.

To ensure the high-impedance state during po

CC through a p

resistor; the minimum value of the resistor is d

Inputs can be driven from either 3.3-V or 5-V d

a mixed 3.3-V/5-V system environment.

ORDERING INFORMATION

(1)

TAPACKAGE(2) ORDERABLE PART NUMBER

SOIC – D Reel of 2500 SN74LVC125AQDRQ1

– 40 C to 125 C° °

TSSOP – PW Reel of 2000 SN74LVC125AQPWRQ1

(1) For the most current package and ordering information,

web site at .www.ti.com

(2) Package drawings, thermal data, and symbolization

FUNCTION TABLE

(EACH BUFFER)

INPUTS OUTPUT

OE A

L H H

L L L

H X Z

Please be aware that an important notice concerning

Texas Instruments semiconductor products and disclaime

PRODUCTION DATA information is current as of publication date.

Products conform to specications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

1OE

1A 1Y

2OE

2A 2Y

3OE

3A 3Y

4OE

4A 4Y

Absolute Maximum Ratings

(1)

SN74LVC125A-Q1

SCAS762B – FEBRUARY 2004 – REVISED APRIL 2008 .............................

www.ti.com

LOGIC DIAGRAM (POSITIVE

over operating free-air temperature range (unless

MIN MAX UNIT

VCC Supply voltage range – 0

VIInput voltage range – 0.5

VOOutput voltage range

(2) (3) – 0.5 V

CC + 0.5 V

IIK Input clamp current V

I< 0 – 50 mA

IOK Output clamp current V

O< 0 – 50 mA

IOContinuous output current

Continuous current through V

CC or GND ± 100

D package 86

θJA Package thermal impedance

(4) °C/W

PW package 113

Tstg Storage temperature range

Ptot Power dissipation

(5) (6) TA= – 40 C to 125 C° °

(1) Stresses beyond those listed under "absolute maximum

only, and functional operation of the device at these or

conditions" is not implied. Exposure to absolute-maximum-rated

(2) The input and output negative-voltage ratings may be

(3) The value of V

CC is provided in the recommended operating conditions

(4) The package thermal impedance is calculated in accorda

(5) For the D package: above 70 C, the value of P°

tot derates linearly with 8 mW/K.

(6) For the PW package: above 60 C, the value of P°

tot derates linearly with 5.5 mW/K.

2Submit Documentation Feedback

Product Folder Link(s): SN74LVC125A-Q1

Recommended Operating Conditions

(1)

Electrical Characteristics

SN74LVC125A-Q1

www.ti.com

..................................................................................................................................................

TA= 25 C – 40 C to 125° ° °

UNIT

MIN MAX MIN MAX

Operating 1.65 3.6 1.65

VCC Supply voltage Data retention only 1.5 1.

VCC = 1.65 V to 1.95 V 0.65 V×

CC 0.65 V×

VIH High-level input voltage V

CC = 2.3 V to 2.7 V 1.7 1.7

VCC = 2.7 V to 3.6 V 2 2

VCC = 1.65 V to 1.95 V 0.35 V×

CC 0.35 V×

VIL Low-level input voltage V

CC = 2.3 V to 2.7 V 0.7

VCC = 2.7 V to 3.6 V 0.8

VIInput voltage 0 5.5 0

VOOutput voltage 0 V

CC 0 V

CC V

VCC = 1.65 V – 4 – 4

VCC = 2.3 V – 8 – 8

IOH High-level output current

VCC = 2.7 V – 12 – 12

VCC = 3 V – 24 – 24

VCC = 1.65 V 4 4

VCC = 2.3 V 8 8 mA

IOL Low-level output current

VCC = 2.7 V 12 12

VCC = 3 V 24 24 mA

Δ Δt/ v Input transition rise or fall rate

(1) All unused inputs of the device must be held at V

CC or GND to ensure proper device operation

Implications of Slow or Floating CMOS Inputs, literature

over recommended operating free-air temperature

TA= 25 C – 40 C to 125° °

PARAMETE TEST CONDITIONS V

CC UNIT

RMIN TYP MAX MIN

IOH = – 100 A 1.65 V to 3.6 V VµCC – 0.2 V

CC – 0.2

IOH = – 4 mA 1.65 V 1.29 1

IOH = – 8 mA 2.3 V 1.9 1.75

VOH V

2.7 V 2.2 2.1

IOH = – 12 mA 3 V 2.4 2.35

IOH = – 24 mA 3 V 2.3 2.1

IOL = 100 A 1.65 V to 3.6 V 0.1µ

IOL = 4 mA 1.65 V 0.24

VOL IOL = 8 mA 2.3 V 0.3

IOL = 12 mA 2.7 V 0.4

IOL = 24 mA 3 V 0.55

IIVI= 5.5 V or GND 3.6 V ± 1

IOZ VO= V

CC or GND 3.6 V ± 1

ICC VI= V

CC or GND, I

O= 0 3.6 V 1 20

One input at V

CC – 0.6 V,

ΔI

CC 2.7 V to 3.6 V 500

Other inputs at V

CC or GND

CiVI= V

CC or GND 3.3 V 5

Product Folder Link(s): SN74LVC125A-Q1

Product specificaties

Merk:	Texas Instruments
Categorie:	Niet gecategoriseerd
Model:	SN74LVC125AQPWRQ1
Breedte:	5.1 mm
Diepte:	4.5 mm
Hoogte:	1.05 mm
Breedte verpakking:	449 mm
Diepte verpakking:	853 mm
Hoogte verpakking:	35 mm
Soort:	Logic IC
Type verpakking:	TSSOP
Aantal per verpakking:	2000 stuk(s)
Temperatuur bij opslag:	-65 - 150 °C
Bedrijfstemperatuur (T-T):	-40 - 125 °C
Aantal pinnen:	14
Breedte (met pennen):	5.1 mm
Diepte (met pennen):	6.6 mm
Hoogte (met pennen):	1.2 mm