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SN54AHC126, SN74AHC126

QUADRUPLE BUS BUFFER GATES

WITH 3-STATE OUTPUTS

SCLS257L – DECEMBER 1995 – REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Operating Range 2-V to 5.5-V VCC

Latch-Up Performance Exceeds 250 mA Per

JESD 17

description/ordering information

The ’AHC126 devices are quadruple bus buer

gates featuring independent line drivers with

3-state outputs. Each output is disabled when the

associated output-enable (OE) input is low. When

OE is high, the respective gate passes the data

from the A input to its Y output.

To ensure the high-impedance state during power

up or power down, OE should be tied to GND

through a pulldown resistor; the minimum value of

the resistor is determined by the current-sourcing

capability of the driver.

ORDERING INFORMATION

TAPACKAGE

†ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74AHC126N SN74AHC126N

SOIC – D

Tube SN74AHC126D

AHC126

SOIC

–

Tape and reel SN74AHC126DR

AHC126

–40

C to 85

SOP – NS Tape and reel SN74AHC126NSR AHC126

–

40 C°

85 C°

SSOP – DB Tape and reel SN74AHC126DBR HA126

TSSOP PW

Tube SN74AHC126PW

HA126

TSSOP

–

Tape and reel SN74AHC126PWR

HA126

TVSOP – DGV Tape and reel SN74AHC126DGVR HA126

CDIP – J Tube SNJ54AHC126J SNJ54AHC126J

–55 C°C to 125°CFP – W Tube SNJ54AHC126W SNJ54AHC126W

LCCC – FK Tube SNJ54AHC126FK SNJ54AHC126FK

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54AHC126 . . . J OR W PACKAGE

SN74AHC126 . . . D, DB, DGV, N, NS, OR PW PACKAGE

(TOP VIEW)

SN54AHC126 . . . FK PACKAGE

(TOP VIEW)

1OE

2OE

GND

VCC

4OE

3OE

3 2 1 20 19

9 10 11 12 13

3OE

2OE

1OE

4OE

GND

NC – No internal connection

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

SN54AHC126, SN74AHC126

QUADRUPLE BUS BUFFER GATES

WITH 3-STATE OUTPUTS

SCLS257L – – DECEMBER 1995 REVISED JULY 2003

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

FUNCTION TABLE

(each buer)

INPUTS OUTPUT

OE A Y

H H H

H L L

L X Z

logic diagram (positive logic)

1OE

1A 1Y

2OE

2A 2Y

3OE

3A 3Y

4OE

4A 4Y

Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, and W packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package 96°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 80°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 76°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg 65 C–°C to 150°. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and”

functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not“ ”

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54AHC126, SN74AHC126

QUADRUPLE BUS BUFFER GATES

WITH 3-STATE OUTPUTS

SCLS257L – – DECEMBER 1995 REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54AHC126 SN74AHC126

UNIT

MIN MAX MIN MAX

UNIT

VCC Supply voltage 2 5.5 2 5.5 V

VCC = 2 V 1.5 1.5

VIH High-level input voltage VCC = 3 V 2.1 2.1 V

VCC = 5.5 V 3.85 3.85

VCC = 2 V 0.5 0.5

VIL Low-level input voltage VCC = 3 V 0.9 0.9 V

VCC = 5.5 V 1.65 1.65

VIInput voltage 0 5.5 0 5.5 V

VOOutput voltage 0 VCC 0 VCC V

VCC = 2 V – –50 50 A

IOH High-level output current VCC = 3.3 V ± 0.3 V – –4 4

VCC = 5 V ±0.5 V – –8 8

VCC = 2 V 50 50 A

IOL Low-level output current VCC = 3.3 V ±0.3 V 4 4

VCC = 5 V ±0.5 V 8 8

t/ v

ut transition rise or fall rate

VCC = 3.3 V ± 0.3 V 100 100

ns/V

∆ ∆t/ v

Input

transition

rise

fall

rate

VCC = 5 V ±0.5 V 20 20

ns/V

TAOperating free-air temperature – –55 125 40 85 C°

NOTE 3: All unused inputs of the device must be held at V

CC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

TA = 25°C SN54AHC126 SN74AHC126

UNIT

PARAMETER

TEST

CONDITIONS

CC MIN TYP MAX MIN MAX MIN MAX

UNIT

2 V 1.9 2 1.9 1.9

IOH = –50 A 3 V 2.9 3 2.9 2.9

VOH 4.5 V 4.4 4.5 4.4 4.4 V

IOH = 4 mA–3 V 2.58 2.48 2.48

IOH = 8 mA–4.5 V 3.94 3.8 3.8

2 V 0.1 0.1 0.1

IOL = 50 A 3 V 0.1 0.1 0.1

VOL 4.5 V 0.1 0.1 0.1 V

IOL = 4 mA 3 V 0.36 0.5 0.44

IOL = 8 mA 4.5 V 0.36 0.5 0.44

IVI = 5.5 V or GND 0 V to 5.5 V ± ± ±0.1 1* 1 A

OZ VO = VCC or GND 5.5 V ± ± ±0.25 2.5 2.5 A

CC VI = VCC or GND, IO = 0 5.5 V 4 40 40 A

iVI = VCC or GND 5 V 4 10 10 pF

* On products compliant to MIL-PRF-38535, this parameter is not production tested at V

CC = 0 V.

Product specificaties

Merk:	Texas Instruments
Categorie:	Niet gecategoriseerd
Model:	SN74AHC126D
Breedte:	8.75 mm
Diepte:	4 mm
Hoogte:	1.5 mm
Breedte verpakking:	8 mm
Diepte verpakking:	506.6 mm
Hoogte verpakking:	3.94 mm
Soort:	Logic IC
Type verpakking:	SOIC
Aantal per verpakking:	50 stuk(s)
Temperatuur bij opslag:	-65 - 150 °C
Bedrijfstemperatuur (T-T):	-40 - 85 °C
Aantal pinnen:	14
Breedte (met pennen):	8.75 mm
Diepte (met pennen):	6.2 mm
Hoogte (met pennen):	1.75 mm