Steren MC14017B Handleiding


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ξ€€ Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1Publication Order Number:
MC14017B/D
The MC14017B is a ξ‹ˆve–stage Johnson decade counter with
built–in code converter. High speed operation and spike–free outputs
are obtained by use of a Johnson decade counter design. The ten
decoded outputs are normally low, and go high only at their
appropriate decimal time period. The output changes occur on the
positive–going edge of the clock pulse. This part can be used in
frequency division applications as well as decade counter or decimal
decode display applications.
β€’Fully Static Operation
β€’DC Clock Input Circuit Allows Slow Rise Times
β€’Carry Out Output for Cascading
β€’Divide–by–N Counting
β€’Supply Voltage Range = 3.0 Vdc to 18 Vdc
β€’Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
β€’Pin–for–Pin Replacement for CD4017B
β€’Triple Diode Protection on All Inputs
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol Parameter Value Unit
VDD DC Supply Voltage Range – 0.5 to +18.0 V
V
in , Vout Input or Output Voltage Range
(DC or Transient)
– 0.5 to VDD + 0.5 V
I
in , Iout Input or Output Current
(DC or Transient) per Pin
Β±10 mA
PDPower Dissipation,
per Package (Note 3.)
500 mW
TAAmbient Temperature Range – 55 to +125 Β°C
Tstg Storage Temperature Range – 65 to +150 Β°C
TLLead Temperature
(8–Second Soldering)
260 Β°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic β€œP and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
This device contains protection circuitry to guard against damage due to high
static voltages or electric elds. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in and Vout
should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
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A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
Device Package Shipping
ORDERING INFORMATION
MC14017BCP PDIP–16 2000/Box
MC14017BD SOIC–16 48/Rail
MC14017BDR2 SOIC–16 2500/Tape & Reel
1. For ordering information on the EIAJ version of the
SOIC packages, please contact your local ON
Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP–16
P SUFFIX
CASE 648
MC14017BCP
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
1
16
14017B
AWLYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14017B
AWLYWW
MC14017BF SOEIAJ–16 See Note 1.
MC14017BFEL SOEIAJ–16 See Note 1.
MC14017B
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2
BLOCK DIAGRAMFUNCTIONAL TRUTH TABLE
(Positive Logic)
Clock Decode
Clock Enable Reset Output=n
0 X 0 n
X 1 0 n
X X 1 Q0
0 0 n+1
X 0 n
X 0 n
1 0 n+1
X = Don’t Care. If n < 5 Carry = β€œ1”,
Otherwise = β€œ0”.
CLOCK
CLOCK
ENABLE
RESET
14
13
15 Cout
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0 3
2
4
7
10
1
5
6
9
11
12
VDD = PIN 16
VSS = PIN 8
LOGIC DIAGRAM
CLOCK
CLOCK
ENABLE CARRY
RESET
Q5 Q1 Q7 Q3 Q9
117621
12
Q0 Q6 Q2 Q3 Q4
3 5 4 9 10
14
13
15
C
C
D
R R
Q
Q
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
Cout
CE
CLOCK
RESET
VDD
Q8
Q4
Q9
Q2
Q0
Q1
Q5
VSS
Q3
Q7
Q6
C
C
D
R R
Q
Q
C
C
D
R R
Q
Q
C
C
D
R R
Q
Q
C
C
D
R R
Q
Q
MC14017B
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3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS)
V
DD
– 55 C 25 C 125 C
Characteristic Symbol
DD
Vdc Min Max Min Typ (4.) Max Min Max Unit
Output Voltage β€œ0” Level
Vin = VDD or 0
VOL 5.0
10
15
β€”
β€”
β€”
0.05
0.05
0.05
β€”
β€”
β€”
0
0
0
0.05
0.05
0.05
β€”
β€”
β€”
0.05
0.05
0.05
Vdc
β€œ1” Level
Vin = 0 or VDD
VOH 5.0
10
15
4.95
9.95
14.95
β€”
β€”
β€”
4.95
9.95
14.95
5.0
10
15
β€”
β€”
β€”
4.95
9.95
14.95
β€”
β€”
β€”
Vdc
Input Voltage β€œ0” Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
VIL
5.0
10
15
β€”
β€”
β€”
1.5
3.0
4.0
β€”
β€”
β€”
2.25
4.50
6.75
1.5
3.0
4.0
β€”
β€”
β€”
1.5
3.0
4.0
Vdc
β€œ1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
VIH
5.0
10
15
3.5
7.0
11
β€”
β€”
β€”
3.5
7.0
11
2.75
5.50
8.25
β€”
β€”
β€”
3.5
7.0
11
β€”
β€”
β€”
Vdc
Output Drive Current
(VOH = 2.5 Vdc) Source
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
IOH
5.0
5.0
10
15
– 3.0
– 0.64
– 1.6
– 4.2
β€”
β€”
β€”
β€”
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
β€”
β€”
β€”
β€”
– 1.7
– 0.36
– 0.9
– 2.4
β€”
β€”
β€”
β€”
mAdc
(VOL = 0.4 Vdc) Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
IOL 5.0
10
15
0.64
1.6
4.2
β€”
β€”
β€”
0.51
1.3
3.4
0.88
2.25
8.8
β€”
β€”
β€”
0.36
0.9
2.4
β€”
β€”
β€”
mAdc
Input Current Iin 15 β€” Β± 0.1 β€” Β±0.00001 Β± 0.1 β€” Β± 1.0 Β΅Adc
Input Capacitance
(Vin = 0)
Cin β€” β€” β€” β€” 5.0 7.5 β€” β€” pF
Quiescent Current
(Per Package)
IDD 5.0
10
15
β€”
β€”
β€”
5.0
10
20
β€”
β€”
β€”
0.005
0.010
0.015
5.0
10
20
β€”
β€”
β€”
150
300
600
Β΅Adc
Total Supply Current (5.) (6.)
(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buers switching)
IT5.0
10
15
IT = (0.27 Β΅A/kHz) f + IDD
IT = (0.55 Β΅A/kHz) f + IDD
IT = (0.83 Β΅A/kHz) f + IDD
Β΅Adc
4. Data labelled β€œTyp” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25 C.
6. To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in Β΅A (per package), C
L in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.0011.


Product specificaties

Merk: Steren
Categorie: Niet gecategoriseerd
Model: MC14017B

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