Microchip VSC8501 Handleiding


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VSC8502
User Guide
VSC8502 Evaluation Board
January 2019
VSC8502 Evaluation Board
VPPD-03741 VSC8502 User Guide Revision 1.1
Contents
1 Revision History ............................................................................................................................. 1
1.1 Revision 1.1 ........................................................................................................................................
1.2 Revision 1.0 ........................................................................................................................................
2 Introduction ................................................................................................................................... 2
3 General Description ....................................................................................................................... 4
3.1 Key Features .......................................................................................................................................
3.1.1 Copper Port RJ45 Connections ................................................................................................................ 4
3.1.2 External RefClk Option ............................................................................................................................ 6
3.1.3 Recovered Clocks .................................................................................................................................... 6
3.1.4 GMII loopback card ................................................................................................................................. 7
3.2 Key Features .......................................................................................................................................
3.2.1 Single 3.3 V Input for Both DUT and Other Components ........................................................................ 8
3.2.2 DUT On-chip Regulator Power ................................................................................................................ 8
4 Quick Start ..................................................................................................................................... 9
4.1 Connecting the Power Supply ............................................................................................................ 9
4.2 PC Software Installation .....................................................................................................................
4.3 Connecting to the Board to the PC ..................................................................................................... 9
4.3.1 Board Initialization ................................................................................................................................ 10
4.3.2 Copper Media Operation (Auto-negotiation Enabled) .......................................................................... 10
4.3.3 Driving Recovered Clock Output ........................................................................................................... 11
4.4 Useful Test Features ......................................................................................................................... 1
4.4.1 Ethernet Packet Generator ................................................................................................................... 11
4.4.2 Copper PHY Error Counters ................................................................................................................... 11
4.4.3 Near-End Loopback ............................................................................................................................... 11
4.4.4 Far-End Loopback .................................................................................................................................. 12
VSC8502 Evaluation Board
VPPD-03741 VSC8502 User Guide Revision 1.1 1
1 Revision History
The revision history describes the changes that were implemented in this document. The changes are
listed by revision, starting with the most current publication.
1.1 Revision 1.1
Revision 1.1 of this datasheet was published in January 2019. The new Microchip template was added to
the document.
1.2 Revision 1.0
Revision 1.0 of this datasheet was published in May 2014. This was the first publication of the
document.
VSC8502 Evaluation Board
VPPD-03741 VSC8502 User Guide Revision 1.1 2
2 Introduction
The VSC8502 device is a low-power, cost-optimized, dual-port gigabit Ethernet PHY. It features
integrated, line-side termination to conserve board space, lower EMI, and improved system
performance. To further reduce system complexity, component count, and system cost, the VSC8502
device can operate from a single 3.3 V supply using integrated voltage regulators. Additionally,
integrated RGMII timing compensation eliminates the need for on-board delay lines. The device also
optimizes power consumption in all link operating speeds and features Wake-on-LAN (WOL) power
management using magic packets.
This document describes the architecture and usage of the VSC8502 Evaluation Board (VSC8502EV). The
Quick Start section describes how to install and run the graphical user interface (GUI) to fully control the
evaluation board.
Figure 1 • VSC8514 Evaluation Board (Top View)
The following illustration shows the bottom view of the VSC8502 evaluation board.
VSC8502 Evaluation Board
VPPD-03741 VSC8502 User Guide Revision 1.1 3
Figure 2 • VSC8514 Evaluation Board (Bottom View)
Additional VSC8502 collateral for both the VSC8502 device and VSC8502EV, including schematics,
layout, GUI, and application notes can be found on the VSC8502 product
web page at: .https://www.vitesse.com/products/product.php?number=VSC8502
VSC8502 Evaluation Board
VPPD-03741 VSC8502 User Guide Revision 1.1 4
3 General Description
The evaluation board, shown in Figure 1, provides the user a way to evaluate the VSC8502 device in
multiple configurations. Two RJ-45 connectors are provided for copper media interfaces. The MAC
interface is exposed via SAMTEC connector (J1) that allows for the complete eval board to be mated
with a motherboard having the necessary signals for operating the device.
For standalone access to all of the features of the device, an external microcontroller is used to
configure the VSC8502 via the MDIO bus. The GUI enables the user to read and write device registers.
3.1 Key Features
This section shows the key features for VSC8502.
3.1.1 Copper Port RJ45 Connections
PHY ports 0 and 1 use generic RJ45 connectors with discrete pulse H5008NL magnetics.
GMII MAC Connector
The parallel MAC interface is available through a Samtec connector J1. As described in section 2.1.7, it
can be configured with the companion daughtercard installed at J1 as
either single-port loopback or port-port traffic passing modes.
Switch Block Control
See Figure 3 for definition of SW1 controls.
See Figure 4 for the default settings.
Table 1 • DIP Switch 1 Options
DUT Control Signal
DUT Control Signal
DUT Control Signal
DUT Control SignalDUT Control Signal DIP SW1
DIP SW1
DIP SW1
DIP SW1DIP SW1 pos ’1’ = pull up to VDDMAC; pos ‘0’ = pull down to GND
pos ’1’ = pull up to VDDMAC; pos ‘0’ = pull down to GND
pos ’1’ = pull up to VDDMAC; pos ‘0’ = pull down to GND
pos ’1’ = pull up to VDDMAC; pos ‘0’ = pull down to GNDpos ’1’ = pull up to VDDMAC; pos ‘0’ = pull down to GND
REFCLK_SEL SW1.1 0=125 MHz (default); 1 =25 MHz
REGEN_10 SW1.2 0=OFF (default); 1= ON
REGEN_25 SW1.3 0=OFF (default); 1= ON
RESERVED3/CLK_SQUELCH_IN SW1.4 1=enabled(default); 0 = disabled
NRESET SW1.5 1=operational (default); 0=held in reset
COMA_MODE SW1.6 0=disabled (default); 1=enabled
The following image shows the SW1 switch control for the VSC8502EV.


Product specificaties

Merk: Microchip
Categorie: Niet gecategoriseerd
Model: VSC8501

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