Microchip USB2533 Handleiding

Microchip Niet gecategoriseerd USB2533

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 2013 - 2015 Microchip Technology Inc. DS00001801C-page 1
INTRODUCTION
The SMBus slave interface can be used to customize the functionality of the USB253x / USB3x13 / USB46x4 hub.
Through this interface, the SOC is able to control the digital and USB lines for internal testing, configure the Hub to func-
tion with the desired options when enumerating, and load custom firmware to fully unlock the features of the embedded
processor. This functionality entails that some configuration registers are accessible only during the configuration
stages, while others are accessible during runtime. Both sets of registers are detailed in this application note.
This document includes the following topics:
• HUB Operational Mode on page 2
•SOC Configuration Stage on page 3
•SMBus Run Time Accessible Registers on page 52
•OTP Configuration on page 61
References
The following documents should be referenced when using this application note. Contact your Microchip representative
for availability.
USB2532 Data Sheet
USB2533 Data Sheet
USB2534 Data Sheet
USB3613 Data Sheet
USB3813 Data Sheet
USB4604 Data Sheet
USB4624 Data Sheet
Protouch Configuration Tool
USB2530 Software Development Kit
System Management Bus Specification, Version 1.0
AN 26.18
Configuration Options for the
USB253x / USB3x13 / USB46x4
Authors: Arnaldo Cruz, Brigham Steele

Microchip Technology, Inc.
AN 26.18
DS00001801C-page 2  2013 - 2015 Microchip Technology Inc.
1.0 HUB OPERATIONAL MODE
1.1 Hub Configuration Stages
The Controller Hub is configured in three stages. The SOC Configuration Stage is executed through the SMBus inter-
face. The hub also is configured from the internal OTP registers through the Hub Configuration Stage and finally during
the Hub Connect Stage. The diagram below shows how these stages flow:
1.2 SMBus Protocol
The SMBus protocol is a flexible 2-pin serial protocol used for low speed communication between integrated circuits.
The protocol consists of a SMBCLK pin generated by the SMBus Master and a bi-directional SMBDATA pin that can be
driven by a Master or a Slave. The bus requires a pull-up resistor on both SMBCLK and SMBDATA to function. The hub
configure the pins as Open/Drain buffers where the driver will either tristate the pin or drive the pin to ground. The input
threshold for the high level ranges from 1.2V to 3.3V, allowing the Hub to communicate with a large sample of SOCs on
the market. Refer to the System Management Bus Specification for more details on the timing specifications of the bus.
FIGURE 1: HUB OPERATIONAL MODE FLOWCHART
Note: Because the OTP Configuration registers are loaded after the SOC_CFG stage, it is possible for configu-
ration registers modified in the SOC_CFG stage to be overwritten in the HUB_CONFIG stage.
HW INIT
SPI?
SMBus?
Run From
External SPI Flash
Run From
Internal ROM
Config Load
From Internal ROM
Combine ROM/SOC
OTP Configuration
Upstream BC
Detection (Optional)
Hub Connect
Configure
Through SMBus
Attach Cmd?
SW_INIT
HUB_CONFIG
SOC_CFG
Y
Y
 2013 - 2015 Microchip Technology Inc. DS00001801C-page 3
AN 26.18
2.0 SOC CONFIGURATION STAGE
The first stage where the SMBus interface is active is the SOC Configuration Stage. In this stage, the SOC may modify
any of the configuration settings to customize the Hub to their purposes. The SOC can configure the hub as Full Speed
only, or have the Hub report a port as non-removable. The SOC can also disable a port entirely to conserve power. The
hub can be addressed at the address 2Dh and interprets the data bytes as shown in the following sub-sections:
2.1 SMBus Block Write
The SMBus block write consists of an Address+Direction(0) byte followed by the 16-bit memory address, split into two
bytes. The address is used for special commands as well as a pointer to the hubs internal memory. After the address,
the next byte of data is the count of data bytes that will follow, up to 128 bytes in a block. Finally, a write of 00h is used
to terminate the write operation followed by the SMBus stop signal.
2.2 SMBus Block Read
The SMBus block read consists of an Address+Direction(0) byte with the 16-bit memory address followed by a repeat
Start signal and an Address+Direction(1) byte. The hub will then start to output the count (128 bytes) and the contents
of the internal registers starting at the 16-bit address specified.
2.3 Special Commands
There are special commands that can be sent in the place of the 16-bit address bytes. These commands are used to
enumerate the hub, access the configuration registers, or simply reset the device. The commands consist of the 16-bit
command followed by a 00h byte to terminate the command.
Note: If more than one hub is on the same SMBus, additional hubs may be held in reset while the initial hub is
being configured.
FIGURE 2: SMBUS BLOCK WRITE
Note: The 7-bit address of the hub is 2Dh. Or the first byte is 5Ah for an SMBus Write.
FIGURE 3: SMBUS BLOCK READ
Note: The 7-bit address of the hub is 2Dh. Or the rst byte is 5Ah for a write and 5Bh for a read.
TABLE 1: SPECIAL SMBUS COMMANDS
Operation OPCODE Description
Configuration Register Access 9937h Read and Write Configuration Registers
USB Attach AA55h Exit SOC_CONFIG and Enter HUB_CONFIG Stage
OTP Program 9933h Permanently program configuration commands to the OTP
OTP Read 9934h Read the values of the OTP register
Note: OTP Program and OTP Read commands reference data starting at configuration register 4800h.
S 0101101 0 A offsetM A offsetL A count A Data1 A Data2 A 00h A P
S 0101101 0
A
offM A offL A S
0101101 1 A Data1 Data2 A DataN cnt A A N P

Product specificaties

Merk: Microchip
Categorie: Niet gecategoriseerd
Model: USB2533

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