Microchip SY58021U Handleiding

Microchip Niet gecategoriseerd SY58021U

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SY58021U

4GHz, 1:4 LVPECL Fanout

Buffer/Translator with Internal Termination

Precision Edge®

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (

408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

General Description

The SY58021U is a 2.5V/3.3V precision, high-speed, fully

differential 1:4 LVPECL fanout buffer. Optimized to provide

four identical output copies with less than 15ps output

skew and only 70 fsRMS phase jitter, the SY58021U can

process clock signals as fast as 4GHz.

The differential input includes Micrel’s unique, 3-pin input

termination architecture interfaces to differential LVPECL,

CML, and LVDS signals (AC- or DC-coupled) as small as

100mV without any level-shifting or termination resistor

networks in the signal path. For AC-coupled input interface

applications, an on-board output reference voltage (V REFAC)

is provided to bias the VT pin. The outputs are 100k

LVPECL compatible, with extremely fast rise/fall times

guaranteed to 70fs.

The SY58021U operates from a 2.5V ±5% supply or 3.3V

±10% supply and is guaranteed over the full industrial

temperature range (–40°C to +85°C). For applications that

require faster rise/fall times, or greater bandwidth, consider

the SY58022U 1:4 fanout buffer with 400mV LVPECL

output swing, or the SY58020U 1:4 CML fanout buffer. The

SY58021U is part of Micrel’s high-speed, Precision Edge ®

product line.

Data sheets and support documentation can be found on

Micrel’s web site at www.micrel.com.

Precision Edge®

Features

•Precision 1:4 LVPECL fanout buffer

•Low jitter performance:

−70fsRMS phase jitter (typical)

•Accepts an input signal as low as 100mV

•Unique input termination and VT pin accepts DC-

coupled and AC-coupled differential inputs: LVPECL,

LVDS, and CML

•100k LVPECL-compatible 800mV swing output

•Power supply 2.5V ± ±5% and 3.3V 10%

• − ° + °40 C to 85 C temperature range

• ×Available in 16-pin (3mm 3mm) QFN package

Applications

•All SONET and GigE clock distribution

•Fibre Channel clock and data distribution

•Backplane distribution

•High-end, low-skew, multiprocessor, synchronous clock

distribution

Block Diagram

September 2011 M9999-090111-B

hbwhelp@micrel.com or (408) 955-1690

Precision Edge is a registered trademark of Micrel, Inc.

Micrel, Inc. SY58021U

September 2011 2 M9999-090111-B

hbwhelp@micrel.com

\Ordering Information(1)

Part Number Package Type Operating Range Package Marking Lead Finish

SY58021UMI QFN-16 Industrial 021U Sn-Pb

SY58021UMITR(2) QFN-16 Industrial 021U Sn-Pb

SY58021UMG(3) QFN-16 Industrial 021U with Pb-Free bar-line indicator Pb-Free

NiPdAu

SY58021UMGTR(2, 3) QFN-16 Industrial 021U with Pb-Free bar-line indicator Pb-Free

NiPdAu

Notes:

1. Contact factory for die availability. Dice are guaranteed at T

A = 25°C, DC electrical only.

2. Tape and Reel.

3. Pb-Free package recommended for new designs.

Pin Configuration

16-Pin QFN

or (408) 955-1690

Micrel, Inc. SY58021U

September 2011 3 M9999-090111-B

hbwhelp@micrel.com or (408) 955-1690

Pin Description

Pin Number Pin Name Pin Function

1, 4 IN, /IN

Differential Input: This input pair receives the signal to be buffered. Each pin of this pair internally

terminates with 50Ω to the VT pin. Note that this input will default to an indeterminate state if left

open. See “Input Interface Applications” section.

2 VT

Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap

for each input (IN, /IN) to the termination network for maximum interface flexibility. See “Input

Interface Applications” section.

3 VREF-AC

Reference Output Voltage: This output biases to VCC –1.2V. It is used when AC-coupling to

differential inputs. Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor

to VCC. See “Input Interface Applications” section.

8, 13 VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCC pins

as possible.

5, 16 GND,

Exposed Pad

Ground. Exposed pad must be connected to a ground plane that is the same potential as the

ground pin.

14, 15, 11, 12,

9, 10, 6, 7

/Q0, Q0, /Q1,

Q1, /Q2, Q2,

/Q3, Q3

LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The output

swing is typically 800mV Proper termination is 50Ω to VCC–2V at the receiving end. Unused

output pairs may be left floating with no impact on jitter or skew. See “LVPECL Output

Termination” section.

Product specificaties

Merk:	Microchip
Categorie:	Niet gecategoriseerd
Model:	SY58021U

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