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6495B–ATARM–21-Apr-10
AT91SAM9M10-G45-EK
....................................................................................................................
User Guide
AT91SAM9M10-G45-EK User Guide 1-i
6495B–ATARM–21-Apr-10
Section 1
Introduction .................................................................................................................1-1
1.1 Scope ................................................................................................................................. 1-1
1.2 Applicable Documents ....................................................................................................... 1-2
Section 2
Kit Contents ............................... ........................................................................ .........2-1
2.1 Deliverables ....................................................................................................................... 2-1
2.2 Evaluation Board Specifications......................................................................................... 2-2
2.3 Electrostatic Warning ......................................................................................................... 2-2
Section 3
Power up.....................................................................................................................3-1
3.1 Power Up the Board........................................................................................................... 3-1
3.2 Battery................................................................................................................................ 3-1
3.3 DevStart ............................................................................................................................. 3-1
3.4 Recovery Procedure .......................................................................................................... 3-2
3.5 Sample Code and Technical Support ................................................................................ 3-2
Section 4
Board Description ............................. ................................................. .........................4-1
4.1 Equipment on the Board .................................................................................................... 4-1
4.1.1 Interfaces ............................................................................................................. 4-1
4.1.2 Board Interface Connection ................................................................................. 4-2
4.1.3 Push Button Switches.......................................................................................... 4-2
4.1.4 Display LCD and LEDs ........................................................................................ 4-3
4.2 Hardware Layout and Configuration .................................................................................. 4-3
4.2.1 Processor............................................................................................................. 4-3
4.2.2 Clock Circuitry...................................................................................................... 4-4
4.2.3 Reset Circuitry ..................................................................................................... 4-4
4.2.4 Memory ................................................................................................................ 4-4
4.2.5 Power Supplies.................................................................................................... 4-7
4.2.6 Debug Interface ................................................................................................. 4-10
4.2.7 Audio Stereo Interface ....................................................................................... 4-15
4.2.8 TV-Out Extension .............................................................................................. 4-17
4.2.9 Software Controlled LEDs ................................................................................. 4-18
4.2.10 Serial Peripheral Interface Controller (SPI) ....................................................... 4-19
4.2.11 Two Wire Interface (TWI)................................................................................... 4-19
4.2.12 SD/MMC Interface ............................................................................................. 4-19
4.2.13 TFT LCD with Touch Panel ............................................................................... 4-20
4.2.14 Push Buttons ..................................................................................................... 4-22
1-ii AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
4.2.15 Expansion Slot................................................................................................... 4-22
Section 5
Configuration ............................. ........................................................................ .........5-1
5.1 JTAG/ICE Configuration..................................................................................................... 5-1
5.2 ETHERNET Configuration ................................................................................................. 5-1
5.3 Jumpers Configuration ....................................................................................................... 5-2
5.4 Miscellaneous Configuration Items .................................................................................... 5-3
5.5 PIO Configuration............................................................................................................... 5-3
5.5.1 Peripheral Signals Multiplexing on I/O Lines ....................................................... 5-3
5.5.2 Multiplexing on PIO Controller A (PIOA).............................................................. 5-3
5.5.3 Multiplexing on PIO Controller B (PIOB).............................................................. 5-5
5.5.4 Multiplexing on PIO Controller C (PIOC) ............................................................. 5-6
5.5.5 Multiplexing on PIO Controller D (PIOD) ............................................................. 5-7
5.5.6 Multiplexing on PIO Controller E (PIOE).............................................................. 5-8
Section 6
Connectors .................................................................................................................6-1
6.1 Power Supply..................................................................................................................... 6-1
6.2 RS232 Connector with RTS/CTS Handshake Support ...................................................... 6-1
6.3 DBGU................................................................................................................................. 6-2
6.4 Ethernet.............................................................................................................................. 6-3
6.5 USB Host ........................................................................................................................... 6-3
6.6 USB Host/Device ............................................................................................................... 6-4
6.7 JTAG Debugging Connector.............................................................................................. 6-4
6.8 SD/MMC- MCI0.................................................................................................................. 6-6
6.9 SD/MMC- MCI1.................................................................................................................. 6-7
6.10 AC97 .................................................................................................................................. 6-8
6.11 Image Sensor - ISI ............................................................................................................. 6-9
6.12 Video................................................................................................................................ 6-10
6.13 Display Devices................................................................................................................ 6-10
6.13.1 TFT LCD ............................................................................................................ 6-10
6.14 LCD Extension ................................................................................................................. 6-11
Section 7
Schematics ................................ ........................................................................ .........7-1
7.1 Schematics......................................................................................................................... 7-1
Section 8
Revision History......................... ........................................................................ .........8-1
8.1 Revision History ................................................................................................................. 8-1
AT91SAM9M10-G45-EK User Guide 1-1
6495B–ATARM–21-Apr-10
Section 1
Introduction
1.1 Scope
This User Guide introduces the AT91SAM9M10(G45) Evaluation Kit and describes its development and
debugging capabilities.
Figure 1-1. Board Photo
The Atmel® SAM9M10-G45-EK is a fully-featured evaluation platform for the Atmel AT91SAM9M10 or
AT91SAM9G45 microcontroller. The kit is equipped with an AT91SAM9M10 chip, which is a superset of
the AT91SAM9G45, and therefore allows evaluating that reference as well. The evaluation kit allows
users to extensively evaluate, prototype and create application-specific designs.
The SAM9M10-G45-EK includes many hardware peripherals such as:
Two high speed USB hosts and one high speed device port
An Ethernet 10/100 interface
Two high speed multimedia card interfaces
Introduction
1-2 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
An LCD TFT display (480*272 RGB) with resistive touch panel
A composite video output
A camera interface
Several communication peripherals such as:
– Universal Synchronous/Asynchronous Receiver Transmitter (USART)
– Two-Wire Interface (TWI)
The external memory block is made of 3 memory types:
DDR2-SDRAM
NAND Flash
NOR Flash (not populated by default)
1.2 Applicable Documents
Table 1-1. Applicable Documents
Reference Title Comments
Atmel Literature n° 6438 SAM9G45 Preliminary
This document describes the SAM9G45, which is part of the
Atmel's Smart ARM® Microcontrollers.
It is available from
http://www.atmel.com/dyn/resources/prod_documents/doc6438.pdf
Atmel Literature n° 6355 SAM9M10 Preliminary
This document describes the SAM9M10, which is part of the
Atmel's Smart ARM® Microcontrollers
http://www.atmel.com/dyn/resources/prod_documents/doc6355.pdf
AT91SAM9M10-G45-EK User Guide 2-1
6495B–ATARM–21-Apr-10
Section 2
Kit Contents
2.1 Deliverables
The Atmel SAM9M10-G45-EK toolkit includes:
Board
– The SAM9M10-G45-EK board
Power supply
– Universal input AC/DC power supply with US, Europe and UK plug adapters
– One 3V Lithium Battery type CR1225
Cables
– One micro A/B-type USB cable
– One serial RS232 cable
– One RJ45 crossed cable
A Welcome Letter
Figure 2-1. Unpacked SAM9M10-G45-EK
Unpack and inspect this kit carefully. Contact your local Atmel distributor, should you have issues con-
cerning the contents of the kit.
Kit Contents
2-2 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
2.2 Evaluation Board Specifications
2.3 Electrostatic Warning
The SAM9M10-G45-EK evaluation board is shipped in a protective anti-static package. The board must
not be subjected to high electrostatic potentials. We strongly recommend using a grounding strap or sim-
ilar ESD protective device when handling the board in hostile ESD environments (offices with synthetic
carpet, for example...). Avoid touching the component pins or any other metallic element on the board.
Table 2-1. SAM9M10-G45-EK Specifications
Characteristics Specifications
Clock speed 400 MHz PCK, 133 MHz MCK
Ports Ethernet, USB, RS232, DBGU, JTAG
Board supply voltage 5 VDC from connector
Temperature
- operating
- storage
-10° to +50° C
-40° to +85° C
Relative humidity 0 to 90% (non condensing)
Dimensions 180 mm x 140 mm
RoHS status Compliant
AT91SAM9M10-G45-EK User Guide 3-1
6495B–ATARM–21-Apr-10
Section 3
Power up
3.1 Power Up the Board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right
power plug adapter corresponding to that of your country, and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the
screen and enjoy the demo.
3.2 Battery
The SAM9M10-G45-EK ships with a 3V coin battery.
This battery is not required for the board to start up.
The coin battery is provided for user convenience in case the user would like to exercise the date and
time backup function of the SAM9M10 series devices when the board is switched off.
3.3 DevStart
The on-board NAND Flash contains a “SAM9M10-G45-EK DevStart”.
It is stored in the “SAM9M10-G45-EK DevStart” folder on the USB Flash disk available when the
SAM9M10-G45-EK is connected to a host computer.
Click the file “welcome.html” in this folder to launch SAM9M10-G45-EK DevStart.
SAM9M10-G45-EK DevStart guides you through installation processes of IAR™ EWARM, Keil MDK and
GNU toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and
how to program it into the SAM9M10-G45-EK. Optionally, if you have a SAM-ICE™, instructions are also
given about how to debug the code.
We recommend that you backup the “SAM9M10-G45-EK DevStart” folder on your computer
before launching it.
Power up
3-2 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
3.4 Recovery Procedure
The DevStart ends by giving step-by-step instructions on how to recover the SAM9M10-G45-EK to the
state as it was when shipped by Atmel.
Follow the instructions if you deleted the contents of the NAND Flash and want to recover from this
situation.
3.5 Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can
d o w n l o a d s a m p l e c od e a n d g e t T e c h ni c a l s u p p o r t f r o m
http://www.atmel.com/dyn/products/tech_support.asp?Faq=y&family_id=689%20.
AT91SAM9M10-G45-EK User Guide 4-1
6495B–ATARM–21-Apr-10
Section 4
Board Description
4.1 Equipment on the Board
Figure 4-1. Board Architecture
4.1.1 Interfaces
The board is equipped with an AT91SAM9M10-CU embedded microprocessor (324-ball TFBGA pack-
age) together with the following interfaces or peripherals:
DDR2/LPDDR memory interface is connected to 128 MB DDR2-SDRAM memory
External Bus Interface (EBI) is connected to three kinds of memory devices (DDR2-SDRAM, NAND
Flash and NOR Flash (not populated))
PARALLEL
FLASH
AT91SAM9M10
DEBUG
JTAG/ICEDBGU
System Controller
External Memory
EBI0 EBI1 / 1.8v
DDR2
SDRAM
DDR2
SDRAM
NAND
FLASH
Multimedia Cards Interface
MCI0
SPI0
MCI1
Data
Flash
USART USB
Host A Host B Device
ETHERNET
10/100 MAC
LCD Interface AC97
PIO
TWI
oooooooo
oooooooo
Serial
Eeprom
oooooooo
oooooooo
4 bits
interface
SD/MMC
8 bits
interface
SD/MMC
Micro
Line In
Line Out
oooooooo
oooooooo
LCD TFT
480*272
PWM
PHY RMII
RS232
Codec
NPCS0
NCS0
NCS3
NCS1
Led
CD
User I/OAudioVidéoLCD TFTMultimedia cardsMain Memory
Touch
Screen
Composite
video
VCC 5V PIOJTAG/ICEDBGUUSB
Hub / Device
USB Hub
High / Full
RS232Ethernet RMII/MIIISI
Image Sensor
Interface
Power /
Shdn
Joystick
& P.B
Board Description
4-2 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
One TWI serial memory
One USB Host/Device multiplexed port interface
One USB Host port interface
One RS232 serial communication port
One DBGU serial communication port
One JTAG/ICE debug interface
One Ethernet 100-base TX with three status LEDs
One AC97 Audio CODEC with headphone line out, line in and mono/stereo microphone inputs
One TV interface (composite video output)
One 4.3" TFT LCD Module with touch screen and back light
One ISI connector (camera interface)
One power red LED and two general-purpose green LEDs
Two user input push buttons
One joystick with 4-direction control and selector
One wakeup input push button
One reset input push button
One SD/SDIO/MMC plus card slot (4/8 bit interface)
One SD/SDIO/MMC card slot (4-bit interface)
One Lithium Coin Cell Battery Retainer for 12 mm cell size (memory backup usage)
4.1.2 Board Interface Connection
Ethernet using RJ45 connector (J15)
USB Host, support USB host using a type A connector (J12)
USB Host/Device, support USB host/device using a type micro AB connector (J14)
UART1 (RX, TX, RTS, CTS) connected to a 9-way male D-type RS232 connector (J11)
DBGU (RX and TX only) connected to a 9-way male D-type RS232 connector (J10)
JTAG, 20 pin IDC connector (J13)
SD/MMCplus connector (J5)
SD/MMC connector (J6)
Headphone (J7), line-in (J8) and microphone headset (J9)
Speaker output (JP15)
Image sensor connector (J17)
TFT LCD display, with TouchScreen and backligth (J24)
Test points; various test points are located throughout the board
Main power supply (J2)
4.1.3 Push Button Switches
Reset, board reset (BP1)
Wake up, push button to bring processor out of low power mode (BP2)
Right and left click, user push button switches (BP4 and BP5)
Joystick (BP3)
Board Description
AT91SAM9M10-G45-EK User Guide 4-3
6495B–ATARM–21-Apr-10
4.1.4 Display LCD and LEDs
Display, 480xRGBx272 pixels LCD module display connected to the PIO port E (LCD1)
One surface-mounted power red LED, user interface (D3)
Two surface-mounted green LEDs, user interface (D1 and D2)
Three surface-mounted LEDs indicate Ethernet status (D4, D5, D6)
Figure 4-2. Board Layout Commented
The major components of the SAM9M10-G45-EK board are shown in Figure 4-1.
4.2 Hardware Layout and Configuration
4.2.1 Processor
The board features the Atmel SAM9M10-CU 324-ball TFBGA package. This chip runs at a nominal fre-
quency of 400 MHz for the core and 133 MHz for the system bus.
For more information, refer to the latest SAM9M10 datasheet available from http://www.atmel.com/
DBGU R 2 2 JTAG ETHERNETS 3
WAKE-UP
BUTTON
RE ETS
BUTTON
BACKUP
BATTERY
«RIGHT»
U ER BUTTONS
«LEFT»
U ER BUTTONS
SD/MMC 1
SLOT
SD/MMC 0
SLOT
U ERS
JOY TICKS
VIDEO
OUTPUT
HEADPHONES
HEADER
MICROPHONE
INPUT
LINE
INPUT
LCD DI PLAY AREASLCD EXTEN IONS
CONNECORS
I I/CAMERAS
CONNECTOR
POWER
HO TS
U BS
HO TS
DEVICE
U BS
Y6
TP2
J20
J7
R85
L11
JP15
J9
J8
TP4
J6
R185
Y7
BP3
C205
R181
R183
L22
L20
MN20
TP6
C203
C206
MN12
JP13
C201
C141
C143
JP14
JP17
JP18
MN14
C139
C146
C147
J10
L17
C198
C128
R71
R69
C126
C199
C133
C129
MN9
R72 R74
R73
R70
C127
C137
C155
C156
R75
R84
R83
R78
L10
Y3
C148
C149
R79
R80
L12
L9
L8
MN15
JP10
J11
J18
MN8
MN11
MN16
MN10
JP9
RR19
RR17
RR13
RR11
JP6
JP5
C168
J12
R203R204
C59
RR25
RR23
RR21
TP5
C48
R40
R42
R44
MN5
RR9
C170
MN17
J14
Y2
C64
C41
C47
C38
C66
R37
R46
MN6
Q2
D3
J17
R20 R5
L4
C186
R99
R106
R39R12
R100
R101
R120
L3
L2
JP8
C177
C179
R117
R116
R48
Y1
J13
J23
RR45
JP11
J1
C183
Y5
Y4
JP3JP2JP1
MN7
J15
R191
R192
R193
R194
R195
R196
RR36
C37
R29
R22
R21
D2D1
JP12
MN13
C185
R114
R109
R104
R115
R105
R112
C178
C176
C182
J5
C31
R27
BP5
L5
JP7
BP2
Q1
JP16
JP4
C23
R110
MN2
C187
C180
C181
C9
RR47
J2
D6
D4
D5
CR1
TP1
R197
R198
TP3
BP4
J3
BP1
C27C6
MN1
MN4
C12
19
20
1
29
30
39
40
71
82
1 2
34
1
2
1 2
34
1
1
2
1
4
2
1
SD/MMC
VIDEO
HEAD PHONE
MIC IN
LINE IN
DBGU
SELECT
E2PROM
NANDCS NCS0
RS232
VDDIOM1
USB
LCD EXTENSION
VDDIOM0
HOST
USB
HOST
/DEV
1
ISI
J1
VDDU TMII
VDDU TMIC
VDDCO RE
VDDP LLUT MI
ICE
BMS
JP2/P2/JD3
VDDI OPn
ET HERNE T
LEFT
BAT
VDDBU
3V3
NPCS0
SD/MMC+
CR1225 3V
WAKEUP
5VCC POWER
RIGHT
NRST
Board Description
4-4 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
4.2.2 Clock Circuitry
The SAM9M10-G45-EK includes six clock sources:
Two are alternatives for the SAM9M10 main clock,
One crystal and one crystal oscillator are used for the Ethernet MII/RMII chip,
One crystal is used for the AC97 codec chip,
One crystal or one crystal oscillator is used for the TV encoder.
4.2.3 Reset Circuitry
The reset sources are:
Power on reset
Push button reset
JTAG reset from an in-circuit emulator interface.
4.2.4 Memory
4.2.4.1 External Memories
The SAM9M10 features a DDR2/LPDDR memory interface and an External Bus Interface (EBI) to permit
interfacing to a wide range of external memories and to almost any kind of parallel peripheral.
The SAM9M10-G45-EK board is equipped with DDR2/LPDDR devices featuring 128 MB of DDR2-
SDRAM memory (16Meg*8*4).
The External Bus Interface (EBI) is connected to three kinds of memory devices:
One Parallel Flash (not populated by default)
Two DDR2-SDRAM
One NAND Flash (2Gb, 8 bit bus)
The chip selects NCS0, NCS1 and NCS3 are used for NOR Flash, DDR2-SDRAM and NAND Flash
memories, respectively. Furthermore, a dedicated jumper can disconnect each of the two NCS0 and
NCS3 signals, making them available for other functions.
Table 4-1. Main Components Associated with the Clock Systems
Quantity Description Component assignment
1 Crystal for Internal Clock, 12 MHz Y1
1 Crystal for RTC Clock, 32.768 kHz Y2
1 Oscillator for Ethernet Clock RMII, 50 MHz Y4
1 Crystal for Ethernet Clock MII, 25 MHz (not populated) Y5
1 Crystal for AC97 Codec Clock, 24.576 MHz Y3
1Crystal for TV Encoder Clock, 13 MHz, or
Oscillator for TV Encoder, 13 MHz (not populated)
Y7
Y6
Board Description
AT91SAM9M10-G45-EK User Guide 4-5
6495B–ATARM–21-Apr-10
Figure 4-3. EBI0 - DDR2
RAS
CAS
NW E
CKE
DDR_D7
DDR_D3
DDR_D2
DDR_D4
DDR_D0
DDR_D1
DDR_D5
DDR_D6
BA0
BA1
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
CK
NCK
CS
DDR_VREF
DDR_VREF DDR_VREF
CK
NCK
CS
BA0
BA1
RAS
CAS
NW E
CKE
DDR_D15
DDR_D11
DDR_D10
DDR_D12
DDR_D8
DDR_D9
DDR_D13
DDR_D14
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
1V8
1V8
1V8
DDR_D[0..15]
DDR_BA0
DDR_BA1
DDR_CKE
DDR_CLK
DDR_N CLK
DDR_CS
DDR_CAS
DDR_RAS
DDR_W E
DDR_A[0..1 3]
DDR_DQS0
DDR_DQM0
DDR_DQS1
DDR_DQM1
DDR_VREF
C7 100nC7 100n88
C71 100nC71 100n C72 100nC72 100n
C80 10 0nC80 100n
C81 100 nC81 100n
C69 100nC69 100n
C84 100 nC84 100n
C85 100 nC85 100n
MN6
DDR2 SDRAM
MN6
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10
H2
BA0
G2
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQSB7
DQSA8
RDQS/DM B3
RDQS/NU A2
VDD H9
VDD L1
VDDL E1
VREF E2
VDDQ C9
VSS A3
VSS E3
VDDQ A9
VDD E9
RFU1
G1
RFU2
L3
CKE
F2
CK
E8
CK
F8
CAS
G7
RAS
F7
WE
F3
CS
G8
VDDQ C1
VDDQ C3
VDDQ C7
V QSS B2
V QSS B8
V QSS D2
V QSS D8
VDD A1
VSS J1
A11
K7
BA1
G3
A12
L2
A13
L8
VSS K9
VSSDL E7
V QSS A7
RFU3
L7
C91
100n
C91
100n
R52
1.5k
R52
1.5k
C76 100nC76 100n
C67 100nC67 100n
C 78
100n
C 78
100n
C6 100nC6 100n88
C79 100nC79 100n
L5 10uHL5 10uH
C82 100 nC82 100n
C83 100nC83 100n
C77 100nC77 100n
C70 100nC70 100n
MN7
DDR2 SDRAM
MN7
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10
H2
BA0
G2
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQSB7
DQSA8
RDQS/DM B3
RDQS/NU A2
VDD H9
VDD L1
VDDL E1
VREF E2
VDDQ C9
VSS A3
VSS E3
VDDQ A9
VDD E9
RFU1
G1
RFU2
L3
CKE
F2
CK
E8
CK
F8
CAS
G7
RAS
F7
WE
F3
CS
G8
VDDQ C1
VDDQ C3
VDDQ C7
V QSS B2
V QSS B8
V QSS D2
V QSS D8
VDD A1
VSS J1
A11
K7
BA1
G3
A12
L2
A13
L8
VSS K9
VSSDL E7
V QSS A7
RFU3
L7
R51
1.5k
R51
1.5k
C73100nC7 100n3
C90
4.7u
C90
4.7u
C74 100nC74 100n
C88
100n
C88
100n
C 98
100n
C 98
100n
R50
1R
R50
1R
C86 100 nC86 100n
C75 100nC75 100n
Board Description
4-6 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Figure 4-4. EBI1 - DDR2 + Flash
Optional 16bits DAT A BUS
With AT 29F2G16ABD Micron
(SDA10) (SDA10)
(NCS3)
(RDY/BSY)
(NANDAL E)
(NANDCLE)
(NCS1)
IMPORTANT note about system booting:
The bootROM allows booting from the block 0 of a NandFlash connected
on CS3. However, the bootROM does not feature ECC (Error Checking and
Correction) on NandFlash.
Most of the NandFlash vendors do not guarantee anymore that block 0
is error free. Therefore we advise the bootstrap program to be located
into another device supported by the bootrom (DataFlash, Serial Flash,
SDCARD or EEPROM) and implement NandFlash access with ECC.
WP
RE
WE
CE
RB EBI1_NAND_FSH_D6
EBI1_NAND_F H_D0S
EBI1_NAND_FSH_D3
EBI1_NAND_F H_D4S
EBI1_NAND_F H_D2S
EBI1_NAND_F H_D1S
EBI1_NAND_FSH_D5
EBI1_NAND_FSH_D7
EBI1_NAND_FSH_D14
EBI1_NAND_FSH_D8
EBI1_NAND_FSH_D11
EBI1_NAND_FSH_D12
EBI1_NAND_FSH_D10
EBI1_NAND_F H_D9S
EBI1_NAND_FSH_D13
EBI1_NAND_FSH_D15
EBI1_DDR_D15
EBI1_DDR_D11
EBI1_DDR_D10
EBI1_DDR_D12
EBI1_DDR_D8
EBI1_DDR_D9
EBI1_DDR_D13
EBI1_DDR_D14
EBI 1_DDR_D7
EBI1_DDR_D3
EBI 1_DDR_D2
EBI 1_DDR_D4
EBI 1_DDR_D0
EBI 1_DDR_D1
EBI 1_DDR_D5
EBI 1_DDR_D6
EBI1_FLASH_D4
EBI1_FLASH_D2
EBI1_FLASH_D10
EBI1_FLASH_D5
EBI1_FLASH_D12
EBI1_FLASH_D9
EBI1_FLASH_D14
EBI1_FLA H_D15S
EBI1_FLA H_DS 3
EBI1_FLASH_D0
EBI1_FLASH_D6
EBI1_FLASH_D7
EBI1_FLASH_D8
EBI1_FLASH_D1
EBI1_FLA H_D1S 3
EBI1_FLA H_D11S
EBI1_DDR_A2
EBI1_DDR_A3
EBI1_ DDR_A4
EBI1_ DDR_A5
EBI1_ DDR_A6
EBI1_ DDR_A7
EBI1_ DDR_A8
EBI1_ D DR_A9
EBI1_ D DR_A10
EBI1_ D DR_A11
EBI1_ D DR_A12
EBI1_ D DR_A13
EBI1_DD R_A15
EBI1_ D DR_A14
EBI1_DDR_A2
EBI1_DDR_A3
EBI1_DDR_A4
EBI1_DDR _A5
EBI1_DDR_A6
EBI1_ D DR_A7
EBI1_DDR_A8
EBI1_DDR_A9
EBI1_DDR_A10
EBI1_DDR_A11
EBI1_DDR_A12
EBI1_DDR_A13
EBI1_DDR_A15
EBI1_DDR_A14
NCLK_EBI1
CS_EBI1
BA0_EBI1
BA1_EBI1
RA _EBI1S
CA _EBI1S
WE_EBI1
CKE_EBI1
CLK_EBI1
NCLK_EBI1
CS_EBI1
BA0_EBI1
BA1_EBI1
RAS_EBI1
CAS_EBI1
WE_EBI1
CKE_EBI1
VREF1
EBI1_FLASH_A1
EBI1_FLASH_A2
EBI1_FLASH_A3
EBI1_FLASH_A4
EBI1_FLASH_A5
EBI1_FLASH_A6
EBI1_FLASH_A7
EBI1_FLASH_A8
EBI1_FLASH_A9
EBI1_FLASH_A10
EBI1_FLASH_A11
EBI1_FLASH_A12
EBI1_FLA H_A15S
EBI1_FLA H_A14S
EBI1_FLASH_A13
EBI1_FLA H_A16S
EBI1_FLASH_A18
EBI1_FLASH_A17
VREF1
VREF1
EBI1_FLASH_A19
EBI1_FLASH_A20
EBI1_FLASH_A21
CLK_EBI1
1V8
1V8
1V8
1V8
1V8
1V8
1V8
1V81V8
EBI1_FLASH_D[0..15]
BA0_EBI1
PC8
EBI1_ DDR_ D [0. .15]
EBI1_FLASH_A[1..21]
EBI1_DDR_A[2..15]
BA1_EBI1
CKE_EBI1
CLK_EBI1
NCLK_EBI1
C _SEBI1
CAS_EBI1
RA _EBI1S
W E_EBI1
DQS0_EBI1
DQM0_EBI1
DQS1_EBI1
DQM1_EBI1
EBI1_NCS0
EBI1_NRD/CFOE
DDR_VREF
EBI1_NWE/NW R0/CFWE
PC5
PC4
EBI1_NANDOE
EBI1_NANDW E
PC14
EBI1_NAND_FSH_D[0..15]
JP9JP9
R430R
R430R
C 18100nFC 18100nFC80100nFC80100nF
MT47H6 4M8C F- 3
DDR2 SDRAM
MN8
MT47H6 4M8C F- 3
DDR2 SDRAM
MN8
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10
H2
BA0
G 2
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQSB7
DQSA8
RDQS/DMB3
RDQS/NUA2
VDD H9
VDD L1
VDDL E1
VRE F E2
VDDQ C9
VSS A3
VSS E3
VDDQ A9
VDD E9
RFU1
G 1
RFU2
L3
CKE
F2
CK
E8
CK
F8
CAS
G7
RAS
F7
WE
F3
CS
G8
VDDQ C1
VDDQ C3
VDDQ C7
V QSS B2
V QSS B8
V QSS D2
V QSS D8
VDD A1
VSS J1
A11
K7
BA1
G3
A12
L2
A13
L8
VSS K9
VSSDL E7
V QSS A7
RFU3
L7
R40 470KR40 470K
C101
100nF
C101
100nF
C104 100nFC104 100nF
C82100nFC82100nF
R46 470KR46 470K
AT49SV322DT
FLASH
CBGA
MN10
DNP
AT49SV322DT
FLASH
CBGA
MN10
DNP
A0
E1
A1
D1
A2
C1
A3
A1
A4
B1
A5
D2
A6
C2
A7
A2
A8
B5
A9
A5
A10
C5
A11
D5
A12
B6
A13
A6
A14
C6
A15
D6
A16
E6
A17
B2
A18
C3RDY/ BUSYA3
A20
D3A19
D4
WE
A4 RESET
B4
OE
G1 CE
F1 VPP
B3
I/00 E2
I/O1 H2
I/O2 E3
I/O3H3
I/O4 H4
I/O5 E4
I/O6 H5
I/O7 E5
I/O8F2
I/O9 G2
I/O10 F3
I/O11 G3
I/O12 F4
I/O13G5
I/O14 F5
I/O15 G6
VCC G4
GND H6
GND H1
NC1 C4
NC F6
R42 0RR42 0R
R 93100KR 93100K
MT29F2G08ABD
NAND FLASH
VFBGA-63
MN11
MT29F2G08ABDHC:D
MT29F2G08ABD
NAND FLASH
VFBGA-63
MN11
MT29F2G08ABDHC:D
WE
C7
N.C6
B9
VCC H8
CE
C6
RE
D4
N.C 11
E3
WP
C3
N.C5
B1
N.C1
A1
N.C2
A2
N.C3
A9
N.C4
A10
N.C 12
E4
N.C13
E5
N.C14
E6
N.C15
E7
R/B
C8
N.C17
F3
N.C36M1
I/O0 H4
N.C34L9
N.C 25
L2
VSS F7
N.C29 J5
VCC J6
VSS K3
ALE
C4
N.C8
D6 N.C7
B10
N.C9
D7
N.C10
D8
CLE
D5
N.C16
E8
N.C35L10
I/O1 J4
I/O3K5
I/O2 K4
N.C28H5
N.C30H6
N.C32H7
I/O7 J8
I/O6 K7
I/O5 J7
I/O4 K6
N.C27 J3
N.C26 H3
VSS C5
N.C 24
L1 VSS K8
LOCK
G5
VCC D3
VCC G4
N.C31G6
N.C18
F4
N.C19
F5
N.C20
F6
N.C22
G3N.C21
F8
N.C33 G7
N.C23
G8
N.C37M2
N.C38 M9
N.C39M10
C 78100nFC 78100nF
JP10JP10
C94 100nFC9 4 100nF
R45 1KR45 1K
C93100nFC93100nF
C83 100nFC83 100nF
R41 470K
R41 470K
MT47H64 M8CF-3
DDR2 S DRAM
MN9
MT47H64 M8CF-3
DDR2 S DRAM
MN9
A0
H8
A1
H3
A2
H7
A3
J2
A4
J8
A5
J3
A6
J7
A7
K2
A8
K8
A9
K3
A10
H2
BA0
G2
ODT
F9
DQ0 C8
DQ1 C2
DQ2 D7
DQ3D3
DQ4 D1
DQ5 D9
DQ6 B1
DQ7 B9
DQSB7
DQSA8
RDQS/DM B3
RDQS/NU A2
VDD H9
VDD L1
VDDL E1
VREF E2
VDDQ C9
VSS A3
VSS E3
VDDQ A9
VDD E9
RFU1
G1
RFU2
L3
CKE
F2
CK
E8
CK
F8
CAS
G7
RAS
F7
WE
F3
CS
G8
VDDQ C1
VDDQ C3
VDDQ C7
V QSS B2
V QSS B8
V QSS D2
V QSS D8
VDD A1
VSS J1
A11
K7
BA1
G3
A12
L2
A13
L8
VSS K9
VSSDL E7
V QSS A7
RFU3
L7
C92 100 nFC92 100nF
C95 100nFC95 100nF
C100
100nF
C100
100nF
C90 100 nFC90 100nF
C103100nFC103100nF
C88 100nF
C88 100nF
C96 100 nFC96 100nF
C102
100nF
C102
100nF
R47
DNP
R47
DNP
C 98100nFC 98100nF
C106 100nFC106 100nF
C99 100nFC99 100nF
C97 100nFC97 100nF
R44 0 RR44 0 R
C91 100nFC91 100nF
C105 100nFC105 100nF
C98100n FC98100nF
C 48100nFC 48100n F
C86100n FC86100n F
C 58100nFC 58100nF
Board Description
AT91SAM9M10-G45-EK User Guide 4-7
6495B–ATARM–21-Apr-10
4.2.5 Power Supplies
The SAM9M10 Board contains four regulated power supplies:
3.3 VDC Supply
1.8 VDC Supply
1.0 VDC Core Supply
1.0 VDC Core UTMI Supply, PLL
The outputs of these regulated power supplies 1 are distributed as necessary to each part of the circuit
board.
The 3.3 VDC Supply is generated by an adjustable LDO. It accepts VIN 5 VCC power and outputs a
regulated +3.3 V to most other circuits on the board.
The 1.8 VDC Supply (VDDIOM0, VDDIOM1) is generated by an adjustable LDO. It is powered by VIN
5 VCC power and outputs a regulated +1.8V.
The 1.0 VDC Core Supply (VDDCORE) is generated by an adjustable LDO. It is powered by the
output of the 3.3 VDC Supply.
The 1.0 VDC Core Supply (VDDUTMIC, VDDPLLUTMI and VDDPLLA) is generated by an adjustable
LDO RT9186A series. It is powered by the output of the 3.3 VDC Supply.
Note: 1. Corresponding test points (TP1 to TP4, GND) are used with jumpers (JP1.1 to JP7) to
permit probing of these voltages.
Board Description
4-8 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Figure 4-5. Power Supply
1V_VDDUTMIC
3 3V
3 3V
3 3V
1V
1V8
1V_VDDUTMIC
VDDUTMII
VDDANA
VDDOSC
VDDIOP0
VDDIOP1
VDDIOP2
VDDISI
VDDUTMIC
VDDPLLUTMI
VDDPLLA
VDDCORE
VDDIOM0
VDDIOM1
VDDBU
J3J3
JP3JP3
1
2
3
C29
4.7u
C29
4.7u
J1-1J1-1
1 2
C2
4.7u
C2
4.7u
JP1JP1
1
2
3
C14
4.7u
C14
4.7u
R20
1R
R20
1R
C22
1u
C22
1u
JP2JP2
1
2
3
C1
100n
C1
100n
J1-3J1-3
5 6
R13
100k
R13
100k
R10
100k
R10
100k
C15
2.2u
C15
2.2u
R12
1R
R12
1R
JP7JP7
1
2
3
C18
100n
C18
100n
JP6JP6
1
2
3
C25
1u
C25
1u
C20
4.7u
C20
4.7u
MN3
RT91 6A8
MN3
RT91 6A8
VIN
1
VIN
2
PGOOD
3
EN
4GND 5
ADJ 6
VOUT 7
VOUT 8
EP
9
C 03
100n
C 03
100n
JP5JP5
1
2
3
C28
100n
C28
100n
L4 10uHL4 10uH
R5
1R
R5
1R
J1-2J1-2
34
C21
10u
C21
10u
C19
10n
C19
10n
L HL H310u3 10u
L1 10uHL1 10uH
R19
47k
R19
47k
R14
12k
R14
12k
C8
100n
C8
100n
J1-4J1-4
78
L2 10uHL2 10uH
R1
1R
R1
1R
Board Description
AT91SAM9M10-G45-EK User Guide 4-9
6495B–ATARM–21-Apr-10
Figure 4-6. Management Power Block
PWR_EN
5V
1V
1V
5V
1V8
1V8
5V
3 3V
3 3V
5V
3 3V
SHDN
FORCE
POWER
ON
REGULATED
5V ONLY
MN4
RT9018A
MN4
RT9018A
PGOOD
1
EN
2
VIN
3
VDD
4NC 5
VOUT 6
ADJ 7
GND 8
EP
9
C9
10u
C9
10u
C12
10u
C12
10u
R9
100k
R9
100k
R18
12k
R18
12k
C11
1u
C11
1u
C26
1u
C26
1u
R11
100k
R11
100k
C23
10u
C23
10u
R16
10k
R16
10k
C310nC310n
MN1
RT9186A
MN1
RT9186A
VIN
1
VIN
2
PGOOD
3
EN
4GND 5
ADJ 6
VOUT 7
VOUT 8
EP
9
R2
100k
R2
100k
C16 10nC16 10n
C5
10n
C5
10n
C4
33u
+
C4
33u
R6
12k
R6
12k
R4 47kR4 47k
C17
15p
C17
15p
R15 15kR15 15k
C7
1u
C7
1u
R7
15k
R7
15k
JP4
SIP2
JP4
SIP2
12
CR1
5V
CR1
5V
MN2
RT9018A
MN2
RT9018A
PGOOD
1
EN
2
VIN
3
VDD
4NC 5
VOUT 6
ADJ 7
GND 8
EP
9
Q1
S 3i156 EDH
Q1
S 3i156 EDH
132
456
C6
10u
C6
10u
R199
100k
R199
100k
J2
DC POWER JACK
J2
DC POWER JACK
1
2
3
R8
47k
R8
47k
C13
1u
C13
1u
R17
10k
R17
10k
C27
10u
C27
10u
C10
1u
C10
1u
C24
1u
C24
1u
R3
100k
R3
100k
Board Description
4-10 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
4.2.6 Debug Interface
4.2.6.1 JTAG/ICE
Software debug is accessed by a standard 20-pin JTAG connection. This allows connection to a stan-
dard USB-to-JTAG in-circuit emulator.
Figure 4-7. JTAG Interface
4.2.6.2 DBGU Com Port
This UART is connected to the DB-9 male socket through an RS-232 Transceiver (TXD and RXD only).
Figure 4-8. DBGU Com Port
TDI
RTCK
TDO
TMS
TCK
NTRST
NRST
3 3 3 3V V
3 3V
NTRST
RTCK
TDI
TMS
TCK
TDO
NRST
ICE INTERFACE
R92 0RR92 0R
J13
HTST-110-01-SM-D
J13
HTST-110-01-SM-D
12
34
56
78
910
1112
13
15
17
19
14
16
18
20
R94
0R
DNP
R94
0R
DNP
R930RR930R
R91 0R
DNP
R91 0R
DNP
RR43
100k
RR43
100k
1
2
3
4 5
6
7
8
3 3V
3 3V
PB13
PB12
SERIAL DEBUG PORT
C1+
V+
VCC
C1-
C2+
C2-V-
T
T
R
R
GND
MN15
ADM3202ARNZ
C1+
V+
VCC
C1-
C2+
C2-V-
GND
MN15
ADM3202ARNZ
116
3
4
5
15
11
10
12
98
13
7
14
2
6
R 78
100k
R 78
100k
C159
100n
C159
100n
R90 0RR90 0R
C163
100n
C163
100n
C157 100nC157 100n
R88
100k
R88
100k
C15 100nC15 100n88
J10J10
5
4
3
2
1
9
8
7
6
10
11
C165 100nC165 100n
Board Description
AT91SAM9M10-G45-EK User Guide 4-11
6495B–ATARM–21-Apr-10
4.2.6.3 User Serial Com Port
The USART1 is used as a user serial communication port. This USART1 is buffered with an RS-232
Transceiver (TXD, RXD and handshake CTS/RTS control) and connected to the DB-9 male socket. Soft-
ware must assign the appropriate PIO pins (PB5 = RXD1, PB4 = TXD1, PD16 = RTS1, PD17 = CTS1) to
enable the UART1 function.
Figure 4-9. User Serial Com Port
Refer to the SAM9M10 datasheet for more information about the SAM9M10 USARTs.
4.2.6.4 USB Port
The SAM9M10-G45-EK features USB communication ports:
Two Host Ports: Full speed OHCI and High speed EHCI
One Device Port: High speed.
USB Host Port0 is directly connected to the first UTMI transceiver. The second Host Port (Port1) is mul-
tiplexed with the USB Device High speed and connected to the second UTMI port.
One USB high/full speed type standard A connector
One USB interface Host/Device Micro AB connector
Refer to the SAM9M10 datasheet for detailed programming information.
3 3V
3 3V
PB5
PD17
PB4
PD16
R 2S 32 COM PORT
C161
100n
C161
100n
C1+
V+
VCC
C1-
C2+
C2- V-
T
T
R
R
GND
MN16
ADM3202ARNZ
C1+
V+
VCC
C1-
C2+
C2- V-
GND
MN16
ADM3202ARNZ
1 16
3
4
5
15
11
10
12
98
13
7
14
2
6
C166 100nC166 100n
C162 100nC162 100n
C160
100n
C160
100n
J11J11
5
4
3
2
1
9
8
7
6
10
11
R 68
100k
R 68
100k C164
100n
C164
100n
R 98
100k
R 98
100k
Board Description
4-12 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Figure 4-10. USB Port
4.2.6.5 Ethernet 10/100 (EMAC) Port
The port is compatible with IEEE® Standard 802.3.
The SAM9M10-G45-EK is equipped with a Davicom DM9161AEP 10/100 Mbps Fast Ethernet Physical
Layer TX/FX Single Chip Transceiver layer functions of 100BASE-TX as . It contains the entire physical
defined by IEEE 802.3u, including the Physical Coding Sublayer (PCS), Physical Medium attachment
(PMA), Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), 10BASE-TX Encoder/Decoder
(ENC/DEC), and Twisted Pair Media Access Unit (TPMAU).
The Ethernet interface integrates an RJ45 connector with an embedded transformer, and three status
LEDs.
The Ethernet interface provides two selectable modes, MII or RMII (Reduced MII), for 100Base-TX or
10Base-TX. The MII and RMII interfaces are capable of both 10Mb/s and 100Mb/s data rates as
described in the IEEE 802.3u standard. The signals used by MII and RMII interfaces are described in the
table below.
Board Description
AT91SAM9M10-G45-EK User Guide 4-13
6495B–ATARM–21-Apr-10
Table 4-2. Pin Mapping for Normal MII and Reduced MII
Pin Name Normal MII Mode Reduced MII Mode
SAM9M10 DM9161 SAM9M10 DM9161
ETX0-ETX1 ETX[0:1] transmit data TXD [0:1] ETX[0:1] TXD [0:1]
ETX2-ETX3 ETX[2:3] transmit data TXD [2:3] NC NC
ETXEN ETXEN: transmit enable TXEN ETXEN: transmit enable TXEN
ETXER ETXER: transmit error TXER/TXD[4] NC NC
ETXCK/REFCK ETXCK: transmit clock TXCLK REFCK: reference clock REF_CLK
ERX0-ERX1 ERX[0:1]: receive data RXD [0:1] ERX[0:1]: receive data RXD [0:1]
ERX2-ERX3 ERX[2:3]: receive data RXD [2:3] NC NC
ERXER ERXER: receive error RXER/RXD[4]/
RPTR/NODE ERXER: receive error RPTR/NODE
ERXDV ERXDV: receive valid data RXDV ECRSDV: carrier sense /
data valid CRS DV
ERXCK ERXCK: receive clock RXCLK NC NC
ECOL ECOL: collision detect COL NC NC
ECRS ECRS: carrier sense /
data valid CRS (PHYAD[2:4] NC NC
EMDC EMDC: management data clock MDC EMDC: management data
clock MDC
EMDIO EMDIO: management data
input / output MDIO EMDIO: management data
input / output MDIO
NRST NRST: microcontroller reset RESET# XT1
(25 MHz) NRST: microcontroller reset RESET# XT1
(REF_CLK 50MHz)
Board Description
4-14 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Figure 4-11. Ethernet Port
For more information about the Ethernet controller device, refer to the Davicom DM9161 controller man-
ufacturer's datasheet.
GND_ETH
GND_ETH
GND_ETH
GND_ETH
GND_ETH
3 3V
3 3V
3 3V
3 3V
3 3V
3 3V
AVDDT
AVDDT
AVDDT
3 3V
PA10
PA14
PA27
PA18
NRST
PA19
PD5
PA29
PA30
PA16
PA15
PA28
PA12
PA13
PA8
PA9
PA17
PA7
PA6
PA11
SPEED 100
FULL DUPLEX
LINK&ACT
(TX_CLK)
(TXD3)
(TXD2)
(RXD1)
(RXD0)
(RX_CLK)
(RX_DV)
RJ45 ETHERNET CONNECTOR
(RXD2)
(TXD1)
(TXD0)
(TX_EN)
(RXD3)
(COL)
(CRS)
(MDC)
(MDIO)
(MDINTR)
(TX_ER)
(RX_ER)
JP16JP16
1 2
RR47
10k
RR47
10k
1
2
3
4 5
6
7
8
C176
100n
C176
100n
C186 100nC186 100n
R10 0R8DNPR10 0R8DNP
R106 0R DNPR106 0R DNP
C174
22p
DNP
C174
22p
DNP
R107
49.9R
R107
49.9R
C185 100nC185 100n
C1 2 100nC1 2 100n88
C184 100nC184 100n
R9 10kR9 10k88
C181
10u
10V
C181
10u
10V
R121
470R
R121
470R
C183
100n
C183
100n
L15
2200R
L15
2200R
1 2
MN18
DM9161AEP
MN18
DM9161AEP
TX_ER/T XD4
16
COL/RMII
36
MDC
24
RX- 4
RX+ 3
TX- 8
TX+ 7
XT1 43
REF_CLK/XT2
42
RX_CLK/10BT SER
34
RX_DV/TE TMODES
37
RX_ER/RXD4/RPTR
38
TX_EN
21
BGRES48
AVDDR 1
AVDDR 2
DVDD
41
DGND
44
DGND
15
AGND 5
AGND 6
LED2/OP2 13
LED1/OP1 12
LED0/OP0 11
TXD3
17
TXD2
18
TXD0
20 TXD1
19
TX_CLK/ISOLATE
22
RXD0/PHYAD0
29 RXD1/PHYAD1
28RXD2/PHYAD2
27 RXD3/PHYAD3
26
CRS/PHYAD4
35
MDIO
25
MDINTR
32
PWRDWN
10
DGND
33
RESET
40
AVDDT 9
DI MDIXS
39
DVDD
30
DVDD
23
AGND 46
BGRESG47
CABLES ST /LINKS ST14
N.C 45
LEDMODE 31
Y5
25MHz
DNP
Y5
25MHz
DNP
13
24
1
2
3
6
4
5
7
8
75
75
7575
1nF
TD+
TD-
CT
NC
RD-
CT
TX+
TX-
RX+
RX-
RD+
J15
J00-0061NL
J15
J00-0061NL
1
2
7
8
3
6
5
4
15
16
R100 0R
DNP
R100 0R
DNP
R102
49.9R
R102
49.9R
R116 0RR116 0R
D6 GreenD6 Green
12
R110 0R DNPR110 0R DNP
R112 0R DNPR112 0R DNP
R114 0R DNPR114 0R DNP
R119 470R
R119 470R
C179 100nC179 100n
C173
100n
C173
100n
D4 YellowD4 Yellow
12
R113
49.9R
R113
49.9R
C180
10u
10V
C180
10u
10V
R10 0R3DNPR10 0R3DNP
R104 0R DNPR104 0R DNP
R99
0R
R99
0R
R105 0R DNPR105 0R DNP
R1230RR12 0R3
R101 0RR101 0R
R109 0R DNPR109 0R DNP
C178
100n
C178
100n
D5 GreenD5 Green
12
R115 1.5kR115 1.5k
R117
6.8k
R117
6.8k
R118
470R
R118
470R
R120 0RR120 0R
RR44
10k
RR44
10k
1
2
3
4 5
6
7
8
C177 100nC177 100n
RR45
10k
RR45
10k
1
2
3
4 5
6
7
8
R122 0RR122 0R
R111
49.9R
R111
49.9R
C175
22p
DNP
C175
22p
DNP
C187
10u
10V
C187
10u
10V
VDD
VSS OUT
OE
Y4
50MHz
VDD
VSS OUT
OE
Y4
50MHz
41
32
RR46
10k
RR46
10k
1
2
3
4 5
6
7
8
Board Description
AT91SAM9M10-G45-EK User Guide 4-15
6495B–ATARM–21-Apr-10
4.2.7 Audio Stereo Interface
The SAM9M10-G45-EK includes a WM9711L AC97 CODEC for digital sound input and output. This
interface includes audio jacks for MIC input (J9), line audio input (J8), headphone line output (J7) and a
2-point speaker output connector (JP15).
It is compliant with AC97 Component Specification V2.2.
Board Description
4-16 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Figure 4-12. Audio Stereo Interface
For more information about the AC97 codec device, refer to the Wolfson WM9711L controller manufac-
turer's datasheet.
AGND_AC97
AGND_AC97
AGND_AC97
AGND_AC97
AGND_AC97
AGND_AC97
AGND_AC97
3 3V AVDD_AC97
AVDD_AC97
3 3V
AVDD_AC97
AGND_AC97
AGND_AC97
3 3V
AGND_AC97
NRST
PD6
PD9
PD8
PD7
PE31
LINE-IN
MONO / STEREO
MICROPHONE INPUT
HEADPHONE
LINE-OUT
8 S Ohm PEAKER
OUTPUT
(AC97TX)
(AC97CK)
(AC97RX)
(AC97FS)
(EXT_CLK)
JP17/JP18 are used
as testpoints
C147
1u
C147
1u
C154
10u
10V
C154
10u
10V
JP14
DNP
JP14
DNP
1 2
R72
47k
R72
47k
L11
10uH
L11
10uH
C141
100n
C141
100n
JP18DNPJP18DNP
12
C129
470p
C129
470p
C144
10u
10V
C144
10u
10V
R76 0RR76 0R
R83
680R
R83
680R
L12
220ohm at 100MHz
L12
220ohm at 100MHz
1 2
R7310kR7 10k3
Y3
24.576MHz
Y3
24.576MHz
13
2 4
C131
100n
C131
100n
C134
10u
10V
C134
10u
10V
C140
10u
10V
C140
10u
10V
J7
S 3TEREO_ .5mm
J7
S 3TEREO_ .5mm
1
34
2 5
C1 7 22pC1 7 22p33
C136
100n
C136
100n
R69 0RR69 0R
JP15
DNP
JP15
DNP
12
R 18
8.2K
R 18
8.2K
+
C127 100u/6.3V
+
C127 100u/6.3V
C145
100n
C145
100n
J8
S 3TEREO_ .5mm
J8
S 3TEREO_ .5mm
1
34
2 5
R79 8.2KR79 8.2K
L7
220ohm at 100MHz
L7
220ohm at 100MHz
1 2
JP17 DNPJP17 DNP
12
R75 0R
DNP
R75 0R
DNP
+
C126 100u/6.3V
+
C126 100u/6.3V
L9
220ohm at 100MHz
L9
220ohm at 100MHz
1 2
C138
100n
C138
100n
C148
470p
C148
470p
R 48
680R
R 48
680R
C155
470p
C155
470p
J9
S 3TEREO_ .5mm
J9
S 3TEREO_ .5mm
1
34
2 5
C150
1u
C150
1u
C153
100n
C153
100n
MN14
WM9711L
MN14
WM9711L
OUT 337
HP_OUT_L 39
HP_OUT_R 41
LOUT2 35
ROUT2 36
SDATAIN
8
GPIO5/SPDIF 48
XTLOUT
3
COMP1 29
COMP2 30
COMP331
CAP2 32
VREF 27
MICBIAS28
GPIO4 47
CREF
12
AGND2 42
AVDD1 25
SPKVDD 38
HPVDD 43
SPKGND 34
DBVDD
1
DCVDD
9
NC1
14
NC2
15
PHONE
20 PCBEEP
19 AGND1
18
LINE _IN_L
23
LINE _IN_R
24
MIC1
21
MIC2
22
AVDD2
13
GPIO2/IRQ 45
GPIO346
SDATAOUT
5
RE ETS
11 SYNC
10
XTLIN
2
BITCLK
6
NC4
17 NC3
16
AGND 26
HP_GND 40
GPIO1 44
MONOOUT 33
DGND1
4
DGND2
7
THERMAL 49
R71
47k
R71
47k
C146
1u
C146
1u
C135
100n
C135
100n
C132
10u
10V
C132
10u
10V
C143
100n
C143
100n
L10
220ohm at 100MHz
L10
220ohm at 100MHz
1 2
C142
10u
10V
C142
10u
10V
C128
470p
C128
470p
R77 0RR77 0R
C130
100n
C130
100n
R 28
8.2K
R 28
8.2K
R70 0RR70 0R
R7849.9RR7849.9R
C139
100n
C139
100n
R85 0RR85 0R
L6
220ohm at 100MHz
L6
220ohm at 100MHz
1 2
R74 100kR74 100k
C1 22pC1 22p3333
L8
220ohm at 100MHz
L8
220ohm at 100MHz
1 2
C151
1u
C151
1u
C152
10u
10V
C152
10u
10V C156
470p
C156
470p
R 08 8.2KR 08 8.2K
C149
470p
C149
470p
Board Description
AT91SAM9M10-G45-EK User Guide 4-17
6495B–ATARM–21-Apr-10
4.2.8 TV-Out Extension
The Chrontel™ CH7024 chip provides an interface between the SAM9M10 LCD Controller and a TV set
by converting LCD signals to TV signals.
The CH7024 is a TV encoder device which encodes the video signals and generates synchronization
signals for NTSC and PAL standards. Supported TV output formats are NTSC-M, NTSC-J, NTSC-433,
PAL-B/D/G/A/I, PAL-M, PAL-N and PAL des video output support for CVBS or S--60. The CH7024 provi
video.
Figure 4-13. TV-Out Extension Port
PE23
PE24
PE25
PE26
PE27
PE28
PE29
PE30
PE15
PE16
PE17
PE18
PE19
PE20
PE21
PE22
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE6
PE6
PE17
PE12
PE28
PE23
PE7
PE1
PE18
PE13
PE29
PE24
PE8
PE2
PE0
PE19
PE3
PE14
PE25
PE9
PE20
PE4
PE15
PE26
PE10
PE21
PE5
PE16
PE11
PE27
PE30
PE22 1V8
3 3V
3 3V
3 3V
3 3V
3 3V
PE[0..30]
PA21
NRST
PA20
TV_XCLK
TV_HSYNC
TV_VSYNC
Composite
Video
O tutpu
(LCDMOD)
(G4)
(R6)
(B3)
(LCDPWR)
(G5)
(LCDDEN)
(LCDCC)
(R7)
(G0)
(B4)
(G6)
(B5)
(R2)
(G7)
(B0)
(G1)
(B6)
(R3)
(G2)
(B7)
(R1)
(R4)
(B1)
(G3)
(LCDDOTCK)
(R5)
(R0)
(B2)
(HSYNC)
(VSYNC)
(TW DO)
(TW CK0)
L21
2200R
L21
2200R
1 2
C197
100n
C197
100n
MN20 CH7024B
MN20 CH7024B
D7
1
D8
2
D9
3
D10
4
D11
5
D12
6
D13
7
D14
8
D15
9
D16
10
D17
11
D18
12
D19
13
D20
14
D21
15
D22
17
D23
19
D0
42
D1
43
D2
44
D3
45
D4
46
D5
47
D6
48
V
39
H
40
XCLK
41
DE
20
RESET
23
VDDIO 38
AVDD_DAC 25
DVDD 16
AVDD_PLL 32
AVDD 33
DGND 18
AGND_DAC 29
AGND_PLL 31
AGND 36
SPD
21
SPC
22
NC
24
C/CVBS26
Y27
CVBS28
ISET 30
XI/FIN
34
XO
35
P-OUT 37
D8
BAT54 LT1GS
D8
BAT54 LT1GS
1 2
3
R180 4.7kR180 4.7k
C204 33pC204 33p
C206
100p
C206
100p
C200
100n
C200
100n
R1 75RR1 75R8383
C205
100p
C205
100p
C208
10p
C208
10p
R17 1.2k8
1%
R17 1.2k8
1%
L18
2200R
L18
2200R
1 2
J20J20
RCA JACK
3
1
C203
100n
C203
100n
C199
10u
10V
C199
10u
10V
C202
100n
C202
100n
R186 0R
DNP
R186 0R
DNP
VDD
VSS OUT
Y6
13MHz
DNP
VDD
VSS OUT
Y6
13MHz
DNP
41
32
C207
100n
DNP
C207
100n
DNP
R181 75RR181 75R
TP6TP6
R185
0R
R185
0R
L17
2200R
L17
2200R
1 2
L22
1.8uH
L22
1.8uHR179 4.7kR179 4.7k
R182
75R
R182
75R
C198
10u
10V
C198
10u
10V
L19
2200R
L19
2200R
1 2
L20
2200R
L20
2200R
1 2
C196
100n
C196
100n
Y7
13MHz
Y7
13MHz
13
24
C209
10p
C209
10p
R184 10k DNPR184 10k DNP
C201
10u
10V
C201
10u
10V
Board Description
4-18 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
4.2.9 Software Controlled LEDs
Three users LED are provided for general use. The LEDs are connected to PIO port lines, allowing their
control through either GPIO or PWM control.
LEDs D1 to D3 are software controlled by PIO pins.
LEDs D4 to D6 indicate Ethernet traffic and link status. These are automatically managed by on-chip
microcontroller hardware. See Section 7.1 ”Schematics” .
Figure 4-14. Software Controlled LEDs
Table 4-3. Discrete LEDs
LED Description Comment
D1 Green LED User software controlled
D2 Green LED User software controlled
D3 Red LED User software controlled
D4 Yellow LED Indicates transmission or reception via Ethernet
D5 Green LED Indicates speed 100
D6 Green LED Is lit when a good link test has been detected
PB17
PB18
PB14
PB15
PB16
3 3V
3 3VPD0
PD31
PD30
PB[14..18]
POWER LED
USER INTERFACE
UP
RIGHT
DOWNPUSH
LEFT
C 63
10n
C 63
10n
D2
Green
D2
Green
1 2
C 43
10n
C 43
10n R28
100R
R28
100R
R22 470RR22 470R
R25
470R
R25
470R
D1
Green
D1
Green
1 2
Q2
IRLML2402
Q2
IRLML2402
1
3
2
D3
Red
D3
Red
12
C33
10n
C33
10n
BP3BP3
JOYSTICK
1
2
3
4
5
6
C 23
10n
C 23
10n
C 53
10n
C 53
10n
R26
100k
R26
100k
R21 470RR21 470R
Board Description
AT91SAM9M10-G45-EK User Guide 4-19
6495B–ATARM–21-Apr-10
4.2.10 Serial Peripheral Interface Controller (SPI)
The SAM9M10 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to
interface with the on-board serial DataFlash®.
Figure 4-15. SPI
4.2.11 Two Wire Interface (TWI)
The SAM9M10 has a full speed (400 -kHz) master/slave I2C Serial Controller. The controller is fully com
patible with the industry standard I2C and SMBus Interfaces. This port is used to interface with the on-
board Serial EEPROM, ISI and TV encoder interface.
Figure 4-16. TWI
4.2.12 SD/MMC Interface
The SAM9M10-G45-EK has two high-speed 8-bit multimedia interfaces MMC/MMCPlus v4.1. The first
interface is used as an 8-bit interface (MCI1), connected to a CE-ATA connector footprint and an 8-bit
SD/MMC card slot. The second interface is used as a 4-bit interface (MCI0), connected to a 4-bit
SD/MMC card slot.
The users must provide their own compatible cards for use with these connectors.
Please note that the power is connected to VCC, which is 3.3 volts.
3 3V
3 3V
PB1
PB2
PB3
PB0
NRST
SERIAL DATAFLASH
(test points)
(SPI0_MISO)
(SPI0_MOSI)
(SPI0_SPCK)
(SPI0_NPCS0)
JP12
SIP2
JP12
SIP2
1 2
C124
100n
C124
100n
JP11
DNP
JP11
DNP
1
2
3
R67
470k
R67
470k
MN13MN13
RESET
3
GND 7
VCC 6
CS
4SCK
2SI
1SO
8
WP 5
R68
0R
DNP
R68
0R
DNP
3 3V
3 3V
PA21
PA20
SERIAL EEPROM
(TW CK0)
(TW DO)
JP13
SIP2
JP13
SIP2
12
R66
10k
R66
10k
C125 100nC125 100n
MN12MN12
A0 1
A1 2
WP 7
SCL
6
VCC
8A33
SDA
5
GND
4
Board Description
4-20 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Figure 4-17. SD/MMC0
Figure 4-18. SD/MMC1
4.2.13 TFT LCD with Touch Panel
The SAM9M10 features an LCD controller. A 4.3" 480x272 Portrait Mode LCD provides the SAM9M10-
G45-EK with a low power LCD display, back light unit and a touch panel, similar to that used on commer-
cial PDAs.
The TFT LCD component is a truly model number TFT1N4633.
Graphics and text can be displayed on the dot matrix panel with up to 16 million colors by supplying 24-
bit data signals (8bitxRGB by default) or 16-bit data signals (5+6+5bitxRGB in option). This allows the
user to develop graphical user interfaces for a wide variety of end applications.
Warning: never connect/disconnect the LCD display from the board while the power supply is on. Doing
so may damage both units and is not covered by warranty.
The back light voltage is generated from a CP2122ST boost converter. It is powered directly by the VIN
5 VCC power (the control for the back light voltages is separated from the main board voltages due to
the specific voltage requirements of the LCD panel).
PA26
PA25
PA27
PA28
PA29
PA30
PA24
PA23
PA31
PA22
3 3V
3 3V
PD29
PD11
PA[22..31]
SD/MMCPlus CARD INTERFACE - MCI1
(MCI1_DA1 )
(MCI1_DA0 )
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
(MCI1_DA4)
(MCI1_DA5)
(MCI1_DA7 )
(MCI1_DA6 )
(MCI1_CD)
(MCI1_WP)
RR36
10k
RR36
10k
1
2
3
4 5
6
7
8
R192
6 k8
R192
6 k8
RR39
27R
RR39
27R
1
2
3
4 5
6
7
8
R193
6 k8
R193
6 k8
C123
100n
C123
100n
R194
6 k8
R194
6 k8
RR41 27RRR41 27R
1
2
3
4 5
6
7
8
R195
6 k8
R195
6 k8
RR42 27R
RR42 27R
1
2
3
4 5
6
7
8
R196
6 k8
R196
6 k8
R197
6 k8
R197
6 k8
R198
6 k8
R198
6 k8
J5J5
8
5
7
6
4
3
2
1
9
14
15
16
13
12
11
10
R191
6 k8
R191
6 k8
PA1
PA5
PA4
PA3
PA2
PA0
3 3V
3 3V
PD10
PA[0..5]
SD/MMC CARD INTERFACE - MCI0
(MCI0_DA1)
(MCI0_DA0)
(MCI0_CK)
(MCI0_CDA)
(MCI0_DA3)
(MCI0_DA2)
(MCI0_CD)
R188
6 k8
R188
6 k8
R189
6 k8
R189
6 k8
R187
6 k8
R187
6 k8
R64
10k
R64
10k
R190
6 k8
R190
6 k8
R65
10k
R65
10k
RR3 8 27RRR38 27R
1
2
3
4 5
6
7
8
J6J6
8
5
7
6
4
3
2
1
9
10
11
12
RR40 27RRR40 27R
1
2
3
4 5
6
7
8
C122 100nC122 100n
Board Description
AT91SAM9M10-G45-EK User Guide 4-21
6495B–ATARM–21-Apr-10
Figure 4-19. TFT LCD
pin 1
pin 2
pin 3
pin 29
pin 4
pin 37
4.3" 480x272
TFT LCD DISPLAY
pin 38
pin 39
pin 32
pin 40
pin 33
pin 42
pin 43
20mA MAX
(LCDPWR)
pin 35
9 LEDs Back Light
pin 36
pin 41
pin 34
pin 5
pin 6
pin 7
pin 8
pin 9
pin 10
pin 11
pin 12
pin 13
pin 14
pin 15
pin 16
pin 17
pin 18
pin 19
pin 20
pin 21
pin 22
pin 23
pin 24
pin 25
pin 26
pin 27
pin 28
pin 30
pin 31
pin 44
pin 45
(pin xx = display pin n um ber )
(LCDDEN)
(G4)
(R6)
(B3)
(LCDPWR)
(G5)
(LCDDEN)
(LCDCC)
(R7)
(G0)
(B4)
(G6)
(B5)
(R2)
(G7)
(B0)
(G1)
(B6)
(R3)
(G2)
(B7)
(R1)
(R4)
(B1)
(G3)
(LCDDOTCK)
(R5)
(R0)
(B2)
(AD1Xm)
(AD3Ym)
(AD0Xp)
(AD2Yp)
(LCDCC)
R48 is placed near processor
YpLCD
VLED-
XmLCD
YmLCD
VLED+
XpLCD
YmLCD
XmLCD
YpLCD
VLED-
VLED+
XpLCD
BLUE 6
BLUE 7
RED0
BLUE 2
BLUE 3
BLUE 4
BLUE 5
BLUE 0
BLUE 1
GREEN5
GREEN6
GREEN7
GREEN2
GREEN3
GREEN4
RED6
RED7
GREEN0
GREEN1
RED2
RED3
RED4
RED5
RED1
PE0
LCDDOTCK
PE2
RED3
PE8
PE10
RED4
PE9
PE11
RED5
PE10
PE12
RED6
PE11
PE13
RED7
PE12
PE14
GREEN2
PE13
PE17
PE14
GREEN3 PE18
PE19GREEN4
PE15
PE20GREEN5
PE16
PE21GREEN6
PE17
PE22GREEN7
PE18
PE26
PE20
BLUE 3
PE27BLUE 4
PE21
PE28BLUE 5
PE22
PE29BLUE 6
PE23
PE30BLUE 7
PE24
PE7
PE8
PE9
PE15
PE16
PE23
PE24
PE25
PE6
PE6
PE17
PE12
PE28
PE23
PE7
PE1
PE18
PE13
PE29
PE24
PE8
PE2
PE0
PE19
PE3
PE14
PE25
PE9
PE20
PE4
PE15
PE26
PE10
PE21
PE5
PE16
PE11
PE27
PE30
PE22
3V3
3V3
5V
PE[0..30]
PD22
PD21
PD23
PD20
LCDDOTCK
C188
100nF
C188
100nF
Conductors
on
TOP SIDE
LG PHILIPS
Z7
LB04 3W Q1
Conductors
on
TOP SIDE
PIN 1
PIN 45
LG PHILIPS
Z7
LB04 3W Q1 R172 0RR172 0R
R184 DNPR184 DNP
RR53ARR53A
1 8
RR49CRR49C
3 6
R155 DNPR155 DNP
RR48ARR48A
1 8
RR49DRR49D
4 5
RR53CRR53C
3 6
RR52ARR52A
1 8
C209
DNP
C209
DNP
C210
DNP
C210
DNP
R157 DNPR157 DNP
R178 0RR178 0R
R161 DNPR161 DNP
R154 0RR154 0R
RR49ARR49A
1 8
R148 0RR148 0R
RR50DRR50D
4 5
R164 0RR164 0R
D12
STPS0540Z
D12
STPS0540Z
R130 0RR130 0R
R176 0RR176 0R
C201
2.2uF
C201
2.2uF
RR50CRR50C
3 6
R175 0RR175 0R
R160 0RR160 0R
R123
10R
R123
10R
RR49BRR49B
2 7
RR48DRR48D
4 5
R149 DNPR149 DNP
R182 DNPR182 DNP
R158 0RR158 0R
C189
10V
10uF
C189
10V
10uF
RR51DRR51D
4 5
R48 33RR48 33R
R151 DNPR151 DNP
R180
10K
R180
10K
RR52CRR52C
3 6
RR53BRR53B
2 7
R150 0RR150 0R
R152 0RR152 0R
RR48BRR48B
2 7
R173 0RR173 0R
R177 0RR177 0R
RR52DRR52D
4 5
R174 0RR174 0R
RR50ARR50A
1 8
R153 DNPR153 DNP
RR50BRR50B
2 7
R50 27RR50 27R
R168 0RR168 0R
R169 DNPR169 DNP
R162 0RR162 0R
R136
4.7K
R136
4.7K
R137
10K
R137
10K
RR51BRR51B
2 7
R183 0RR183 0R
C211
DNP
C211
DNP
R144 0RR144 0R
C203
220nF
C203
220nF
R145 DNPR145 DNP
R166 0RR166 0R
R133 0RR133 0R
R179 0RR179 0R
R181 0RR181 0R
R167 DNPR167 DNP
RR51CRR51C
3 6
R163 DNPR163 DNP
RR52BRR52B
2 7
L23
22uH
L23
22uH
J24
XF2M45151A
J24
XF2M45151A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
R159 DNPR159 DNP
R165 DNPR165 DNP
RR53DRR53D
4 5
R132 0RR132 0R
R156 0RR156 0R
RR48CRR48C
3 6
R170 0RR170 0R
R147 DNPR147 DNP
MN25 TPS61161DRVTMN25 TPS61161DRVT
SW 4
GND
3
FB
1CTRL 5
COMP 2
VIN 6
THP
7
R131 0RR131 0R
RR51ARR51A
1 8
R171 DNPR171 DNP
R146 0RR146 0R
C202
1uF
C202
1uF C208
DNP
C208
DNP
Board Description
4-22 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
4.2.14 Push Buttons
The SAM9M10-G45-EK is equipped with two system push buttons, two user push buttons and one joy-
stick. The push buttons consist of momentary push button switches mounted directly to the board. When
any switch is depressed, a low (zero) appears at the associated input pin.
System push buttons:
– Reset, perform system reset
– Wakeup, perform system wake up
User push button:
– Right click
– Left click
Joystick:
– One touch, 5-way switching,
– Normally open momentary contacts,
– Push down to select in any position.
Figure 4-20. Push Buttons
4.2.15 Expansion Slot
GPIO1 & GPIO2, LCD signals (PIO E) are routed to the connectors extension J23
All I/Os of the SAM9M10 Image Sensor Interface are routed to connectors J17
Touch screen signals and analog I/O are connected to J18
This allows the developer to extend the features of the board by adding external hardware components
or boards.
VDDBU
3 3V
NRST
WAKE UP
PB7
PB6
RIGHT CLICK
WAKE UP
NRST
LEFT CLICK
BP5BP5
C 73
10n
C 73
10n
R24
1k
R24
1k
BP2BP2
R29
100R
R29
100R
R23
100k
R23
100k
BP4BP4
R27
100R
R27
100R
BP1BP1
C 13
10n
C 13
10n
Board Description
AT91SAM9M10-G45-EK User Guide 4-23
6495B–ATARM–21-Apr-10
Figure 4-21. Expansion Slot
PE27
PE29
PE25
PE23
PE2
PE1
PE16
PE20
PE18
PE14
PE22
PE10
PE12
PE26
PE30
PE28
PE24
PE6
PE7
PE0
PE9
PE8
PE11
PE13
PE15
PE17
PE21
PE19
PB21
PB23
PB25
PB27
PB9
PB11
PA21
PB31
PB29
PB30
PB28
PB20
PB22
PB24
PB26
PB8
PB10
PA20
3 3V
3 3V
3 3V
5V
3 3V
VDDISI
PD25
PD27
PD19
PD24
PD26
PD18
PD15PD14
PD21
PD23
PD20
PD22
PD12 PD13
LCDDOTCK
LCDHSYNC LCDVSYNC
IMAGE SENSOR CONNECTOR
CONNECTOR EXTENSION FOR LARGE LCD
(AD1Xm)
(AD3Ym) (AD2Yp)
(AD0Xp)
(GPIO2)(GPIO1)
)2LRTC()1LRTC(
J17
HDR_2x15_ MTS
J17
HDR_2x15_ MTS
1 2
34
5 6
78
9 10
11 12
13
15
17
19
14
16
18
20
21 22
2324
25 26
27 28
29 30
C212
100n
C212
100n
J23
HDR_2x20_SMT
DNP
J23
HDR_2x20_SMT
DNP
1 2
34
5 6
78
9 10
11 12
13
15
17
19
14
16
18
20
21 22
2324
25 26
27 28
29 30
3 31 2
33 34
3 35 6
3738
39 40
C210
100n
C210
100n
C211
10u
10V
C211
10u
10V
J18
HDR_2x10_SMT
DNP
J18
HDR_2x10_SMT
DNP
1 2
34
5 6
78
9 10
11 12
13
15
17
19
14
16
18
20
R175 0R
DNP
R175 0R
DNP
R176 0R
DNP
R176 0R
DNP
AT91SAM9M10-G45-EK User Guide 5-1
6495B–ATARM–21-Apr-10
Section 5
Configuration
5.1 JTAG/ICE Configuration
5.2 ETHERNET Configuration
RMII is the factory default mode.
To evaluate the MII mode, the user has to unsolder R99 and solder R100, R103 to R105, R108 to R110,
R112, R114, C174, C175, Y5.
Table 5-1. JTAG/ICE Configuration
Designation Default Setting Feature
R91 Not populated Disables the ICE NTRST input
R92 Soldered Enables the ICE RTCK return. R94 must be opened
R93 Soldered Enables the ICE NRST input
R94 Not populated Disables TCK <-> RTCK local loop
Configuration
5-2 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
5.3 Jumpers Configuration
Two types of jumpers are used on the SAM9M10-G45-EK board:
2-pin jumpers with two possible settings:
– Fitted: the circuit is closed
– Not fitted: the circuit is open
3-pin jumpers with two possible positions, for which settings are presented in the following tables.
Table 5-2. Jumpers Configuration
Designation
Default
Setting Feature
J1
(combined
jumper array)
Closed J1-1 1-2 VDDUTMII 3V3
Closed J1-2 3-4 VDDUTIMC 1V
Closed J1-3 5-6 VDDCORE 1V
Closed J1-4 7-8 VDDPLLUTMI 1V
JP1 1-2 JP1 1-2 VDDIOP0 3V3
2-3 External power to VDDIOP0 3V3 nominal
JP2 1-2 JP2 1-2 VDDIOP1 3V3
2-3 External power to VDDIOP1 3V3 nominal
JP3 1-2 JP3 1-2 VDDIOP2 3V3
2-3 External power to VDDIOP2 3V3 nominal
JP4 Opened
Forces power on.
To use the software shutdown control, JP4 must be opened.
3V battery backup must be present and JP7 jumper set in position 1-2
JP5 1-2 JP5 1-2 VDDIOM0 1V8
2-3 External power to VDDIOM0 1V8 nominal
JP6 1-2 JP6
1-2 VDDIOM1 1V8
2-3 External power to VDDIOM1 1V8 nominal
JP7 1-2 JP7 1-2 VDDBU Lithium 3V Battery
2-3 VDDBU 3.3V from regulator
JP8 Opened BMS Enables Boot on the internal ROM; closed selects the boot from the external device connected
to NCS0
JP9 Closed Enables chip select access, Boot on the NCS0 (MN10 Flash)
JP10 Closed Enables chip select access, Boot on the NCS3 (MN11 NAND Flash)
JP11 Test point JP11.1: SO JP11.2: SI JP11.3: SCK
JP12 Closed Enables chip select access, Boot on the SPIO_NPCS0 (Serial DataFlash MN13)
JP13 Opened Set address A0 low (MN12 Serial EEPROM), enable Boot access.
JP14 JP14.1 = Line_Out JP14.3 = AGND
JP15 Used to connect a Loudspeaker
JP16 Closed DISMDIX (MN18)
JP17-JP18 Test points Give access to the four GPIOs of WM9711L
Configuration
AT91SAM9M10-G45-EK User Guide 5-3
6495B–ATARM–21-Apr-10
5.4 Miscellaneous Configuration Items
N.P = not populated
P = populated
5.5 PIO Configuration
5.5.1 Peripheral Signals Multiplexing on I/O Lines
The AT91SAM9M10 product features 5 PIO controllers, PIOA, PIOB, PIOC, PIOD and PIOE, which mul-
tiplex the I/O lines of the peripheral set. Each PIO Controller controls up to 32 lines. Each line can be
assigned to one of two peripheral functions, A or B. The multiplexing tables in the following paragraphs
define how the I/O lines of peripherals A and B are multiplexed on the PIO Controllers.
5.5.2 Multiplexing on PIO Controller A (PIOA)
"R.Select" = connection selectable via an on-board resistor (default not populated)
Table 5-3. Miscellaneous Configuration
Designation
Default
Setting Feature
R34 N.P JTAGSEL
R35 P Connect TSADVREF to VDDANA (may be used for specific filtering)
R36 P Connect GNDANA to GND (may be used for specific filtering)
R38 P Force TST pin to GND (chip is set in non-test mode = normal operation mode)
R63 N.P Write protect NAND Flash (mount a 0-ohm resistor to write-protect the NAND
Flash device)
R68 N.P Write protect serial DataFlash (mount a 0-ohm resistor to write-protect the serial
Flash device)
R75 N.P External clock Audio AC97 (mount a 0-ohm resistor to connect it)
R91,R92
R93,R94
ICE interface reset and clocking schemes (see Section 5.1 ”JTAG/ICE
Configuration” )
R100, R103
to R105,
R108 to
R110, R112,
R114, C174,
C175, Y5
Ethernet interface, MII mode (see Section 5.2 ”ETHERNET Configuration” )
Y6, R184,
R186 N.P External 13 MHz oscillator (option) for the on-board video composite encoder
TP1 GND Test point
TP2 GND Test point
TP3 GND Test point
TP4 GND Test point
Configuration
5-4 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
Table 5-4. PIO Multiplexing Port A
I/O Peripheral A Peripheral B Function and Comments Power
PA0 MCI0_CK TCLK3 MMCI0 Clock VDDIOP0
PA1 MCI0_CDA TIOA3 MMCI0 Command VDDIOP0
PA2 MCI0_DA0 TIOB3 MMCI0 Data0 VDDIOP0
PA3 MCI0_DA1 TCKL4 MMCI0 Data1 VDDIOP0
PA4 MCI0_DA2 TIOA4 MMCI0 Data2 VDDIOP0
PA5 MCI0_DA3 TIOB4 MMCI0 Data3 VDDIOP0
PA6 MCI0_DA4 ETX2 Ethernet MII VDDIOP0
PA7 MCI0_DA5 ETX3 Ethernet MII VDDIOP0
PA8 MCI0_DA6 ERX2 Ethernet MII VDDIOP0
PA9 MCI0_DA7 ERX3 Ethernet MII VDDIOP0
PA10 ETX0 Ethernet RMII Transmit data 0 VDDIOP0
PA11 ETX1 Ethernet RMII Transmit data 1 VDDIOP0
PA12 ERX0 Ethernet RMII Receive data 0 VDDIOP0
PA13 ERX1 Ethernet RMII Receive data 1 VDDIOP0
PA14 ETXEN Ethernet RMII Transmit enable VDDIOP0
PA15 ERXDV Ethernet RMII Receive data valid VDDIOP0
PA16 ERXER Ethernet RMII Receive Error VDDIOP0
PA17 ETXCK Ethernet RMII Transmit Clock VDDIOP0
PA18 EMDC Ethernet RMII Manag.Data Clock VDDIOP0
PA19 EMDIO Ethernet RMII Manag.Data In/Out VDDIOP0
PA20 TWD0 Two Wire Interface Data VDDIOP0
PA21 TWCK0 Two Wire Interface Clock VDDIOP0
PA22 MCI1_CDA SCK3 MMCI1 Command VDDIOP0
PA23 MCI1_DA0 RTS3 MMCI1 Data0 VDDIOP0
PA24 MCI1_DA1 CTS3 MMCI1 Data1 VDDIOP0
PA25 MCI1_DA2 PWM3 MMCI1 Data2 VDDIOP0
PA26 MCI1_DA3 TIOB2 MMCI1 Data3 VDDIOP0
PA27 MCI1_DA4 ETXER R.Select MMCI1 Data4 Ethernet MII VDDIOP0
PA28 MCI1_DA5 ERXCK R.Select MMCI1 Data5 Ethernet MII VDDIOP0
PA29 MCI1_DA6 ECRS R.Select MMCI1 Data6 Ethernet MII VDDIOP0
PA30 MCI1_DA7 ECOL R.Select MMCI1 Data7 Ethernet MII VDDIOP0
PA31 MCI1_CK PCK0 MMCI1_clock VDDIOP0
Configuration
AT91SAM9M10-G45-EK User Guide 5-5
6495B–ATARM–21-Apr-10
5.5.3 Multiplexing on PIO Controller B (PIOB)
Table 5-5. PIO Multiplexing Port B
I/O Peripheral A Peripheral B Function and Comments Power
PB0 SPI0_MISO SPI Slave Out Serial DataFlash VDDIOP0
PB1 SPI0_MOSI SPI Slave In Serial DataFlash VDDIOP0
PB2 SPI0_SPCK SPI Serial Clock Serial DataFlash VDDIOP0
PB3 SPI0_NPCS0 SPI Chip Select Serial DataFlash VDDIOP0
PB4 TXD1 USART1 Transmit Data VDDIOP0
PB5 RXD1 USART1 Receive Data VDDIOP0
PB6 TXD2 User Push Button Right click VDDIOP0
PB7 RXD2 User Push Button Left click VDDIOP0
PB8 TXD3 ISI_D8 Image Sensor Data 8 VDDIOP2
PB9 RXD3 ISI_D9 Image Sensor Data 9 VDDIOP2
PB10 TWD1 ISI_D10 Image Sensor Data 10 VDDIOP2
PB11 TWCK1 ISI_D11 Image Sensor Data 11 VDDIOP2
PB12 DRXD DBGU Receive Data VDDIOP0
PB13 DTXD DBGU Transmit Data VDDIOP0
PB14 SPI1_MISO Joystick Left VDDIOP0
PB15 SPI1_MOSI CTS0 Joystick Right VDDIOP0
PB16 SPI1_SPCK SCK0 Joystick Up VDDIOP0
PB17 SPI1_NPCS0 RTS0 Joystick Down VDDIOP0
PB18 RXD0 SPI0_NPCS1 Joystick Push VDDIOP0
PB19 TXD0 SPI0_NPCS2 UsbVbus VDDIOP0
PB20 ISI_D0 Image Sensor Data 0 VDDIOP2
PB21 ISI_D1 Image Sensor Data 1 VDDIOP2
PB22 ISI_D2 Image Sensor Data 2 VDDIOP2
PB23 ISI_D3 Image Sensor Data 3 VDDIOP2
PB24 ISI_D4 Image Sensor Data 4 VDDIOP2
PB25 ISI_D5 Image Sensor Data 5 VDDIOP2
PB26 ISI_D6 Image Sensor Data 6 VDDIOP2
PB27 ISI_D7 Image Sensor Data 7 VDDIOP2
PB28 ISI_PCK Image Sensor Data Clock VDDIOP2
PB29 ISI_VSYNC Image Sensor Vertical Synchro VDDIOP2
PB30 ISI_HSYNC Image Sensor Horizontal Synchro VDDIOP2
PB31 ISI_MCK PCK1 Image Sensor Reference Clock VDDIOP2
Configuration
5-6 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
5.5.4 Multiplexing on PIO Controller C (PIOC)
Table 5-6. PIO Multiplexing Port C
I/O Peripheral A Peripheral B Function and Comments Power
PC0 DQM2 VDDIOM1
PC1 DQM3 VDDIOM1
PC2 A19 Add19 NAND Flash VDDIOM1
PC3 A20 Add20 NAND Flash VDDIOM1
PC4 A21/NANDALE ALE NAND Flash VDDIOM1
PC5 A22/NANDCLE CLE NAND Flash VDDIOM1
PC6 A23 VDDIOM1
PC7 A24 VDDIOM1
PC8 CFCE1 Ready/Busy NAND Flash VDDIOM1
PC9 CFCE2 RTS2 VDDIOM1
PC10 NCS4/CFCS0 TCLK2 VDDIOM1
PC11 NCS5/CFCS1 CTS2 VDDIOM1
PC12 A25/CFRNW VDDIOM1
PC13 NCS2 VDDIOM1
PC14 NCS3/NANDCS Chip select NAND Flash VDDIOM1
PC15 NWAIT VDDIOM1
PC16 D16 VDDIOM1
PC17 D17 VDDIOM1
PC18 D18 VDDIOM1
PC19 D19 VDDIOM1
PC20 D20 VDDIOM1
PC21 D21 VDDIOM1
PC22 D22 VDDIOM1
PC23 D23 VDDIOM1
PC24 D24 VDDIOM1
PC25 D25 VDDIOM1
PC26 D26 VDDIOM1
PC27 D27 VDDIOM1
PC28 D28 VDDIOM1
PC29 D29 VDDIOM1
PC30 D30 VDDIOM1
PC31 D31 VDDIOM1
Configuration
AT91SAM9M10-G45-EK User Guide 5-7
6495B–ATARM–21-Apr-10
5.5.5 Multiplexing on PIO Controller D (PIOD)
Table 5-7. PIO Multiplexing Port D
I/O Peripheral A Peripheral B Function and Comments Power
PD0 TK0 PWM3 Command LED2 VDDIOP0
PD1 TF0 Output ENA USB Host VDDIOP0
PD2 TD0 Input FLGA USB Host VDDIOP0
PD3 RD0 Output ENB USB Host VDDIOP0
PD4 RK0 Input FLGB USB Host VDDIOP0
PD5 RF0 Int. Ethernet 10/100 MDINTR VDDIOP0
PD6 AC97RX AC97 Receive Signal VDDIOP0
PD7 AC97TX TIOA5 AC97 Transmit Signal VDDIOP0
PD8 AC97FS TIOB5 AC97 Frame Sync Signal VDDIOP0
PD9 AC97CK TCLK5 AC97 Clock Signal VDDIOP0
PD10 TD1 Card Detect MMCI0 MCI0_CD VDDIOP0
PD11 RD1 Card Detect MMCI1 MCI1_CD VDDIOP0
PD12 TK1 PCK0 CTRL1 Image Sensor Interface VDDIOP0
PD13 RK1 CTRL2 Image Sensor Interface VDDIOP0
PD14 TF1 GPIO1 Large LCD (connector) VDDIOP0
PD15 RF1 GPIO2 Large LCD (connector) VDDIOP0
PD16 RTS1 USART1 Request to Send VDDIOP0
PD17 CTS1 USART1 Clear To Send VDDIOP0
PD18 SPI1_NPCS2 IRQ VDDIOP0
PD19 SPI1_NPCS3 FIQ VDDIOP0
PD20 TIOA0 TSAD0 Touch screen X_Right VDDANA
PD21 TIOA1 TSAD1 Touch screen X_Left VDDANA
PD22 TIOA2 TSAD2 Touch screen Y_Up VDDANA
PD23 TCLK0 TSAD3 Touch screen Y_Down VDDANA
PD24 SPI0_NPCS1 PWM0 GPAD4 General purpose A/D4 VDDANA
PD25 SPI0_NPCS2 PWM1 GPAD5 General purpose A/D5 VDDANA
PD26 PCK0 PWM2 GPAD6 General purpose A/D6 VDDIOP0
PD27 PCK1 SPI0_NPCS3 GPAD7 General purpose A/D7 VDDIOP0
PD28 TSADTRG SPI1_NPCS1 USB Plug-ID IDUSB VDDIOP0
PD29 TCLK1 SCK1 MCI1_WP VDDIOP0
PD30 TIOB0 SCK2 Command Power Led VDDIOP0
PD31 TIOB1 PWM1 Command LED1 VDDIOP0
Configuration
5-8 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
5.5.6 Multiplexing on PIO Controller E (PIOE)
Table 5-8. PIO Multiplexing Port E
I/O Peripheral A Peripheral B Function and Comments Power
PE0 LCDPWR PCK0 LCD Panel Pow.Enab.Ctrl VDDIOP1
PE1 LCDMOD LCD Modulation Signal VDDIOP1
PE2 LCDCC LCD Contrast Control VDDIOP1
PE3 LCDVSYNC LCD Vertical Synch. VDDIOP1
PE4 LCDHSYNC LCD Horizontal Synch. VDDIOP1
PE5 LCDDOTCK LCD Dot Clock VDDIOP1
PE6 LCDDEN LCD Data Enable VDDIOP1
PE7 LCDD0 LCDD2 LCD-Red0 VDDIOP1
PE8 LCDD1 LCDD3 LCD-Red1 VDDIOP1
PE9 LCDD2 LCDD4 LCD-Red2 VDDIOP1
PE10 LCDD3 LCDD5 LCD-Red3 VDDIOP1
PE11 LCDD4 LCDD6 LCD-Red4 VDDIOP1
PE12 LCDD5 LCDD7 LCD-Red5 VDDIOP1
PE13 LCDD6 LCDD10 LCD-Red6 VDDIOP1
PE14 LCDD7 LCDD11 LCD-Red7 VDDIOP1
PE15 LCDD8 LCDD12 LCD-Green0 VDDIOP1
PE16 LCDD9 LCDD13 LCD-Green1 VDDIOP1
PE17 LCDD10 LCDD14 LCD-Green2 VDDIOP1
PE18 LCDD11 LCDD15 LCD-Green3 VDDIOP1
PE19 LCDD12 LCDD18 LCD-Green4 VDDIOP1
PE20 LCDD13 LCDD19 LCD-Green5 VDDIOP1
PE21 LCDD14 LCDD20 LCD-Green6 VDDIOP1
PE22 LCDD15 LCDD21 LCD-Green7 VDDIOP1
PE23 LCDD16 LCDD22 LCD-Blue0 VDDIOP1
PE24 LCDD17 LCDD23 LCD-Blue1 VDDIOP1
PE25 LCDD18 LCD-Blue2 VDDIOP1
PE26 LCDD19 LCD-Blue3 VDDIOP1
PE27 LCDD20 LCD-Blue4 VDDIOP1
PE28 LCDD21 LCD-Blue5 VDDIOP1
PE29 LCDD22 LCD-Blue6 VDDIOP1
PE30 LCDD23 LCD-Blue7 VDDIOP1
PE31 PWM2 PCK1 AC97 External Clock VDDIOP1
AT91SAM9M10-G45-EK User Guide 6-1
6495B–ATARM–21-Apr-10
Section 6
Connectors
6.1 Power Supply
The SAM9M10-G45-EK evaluation board can be powered from a DC 5V power supply via the external
power supply jack (J2) shown in Figure 6-1. The positive pole must be on J2 center pin.
Figure 6-1. Power Supply Connector J2
6.2 RS232 Connector with RTS/CTS Handshake Support
Connector J11 is the COM1 connector.
Figure 6-2. RS232 COM1 Connector J11
Table 6-1. Power Supply Connector J2 Signal Description
Pin Mnemonic Signal description
1 Center +5 VCC
2 Gnd
Connectors
6-2 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
6.3 DBGU
Connector J10 is the DBGU connector.
Figure 6-3. RS232 DBGU Connector J10
Table 6-2. Serial COM1 Connector J11 Signal Descriptions
Pin Mnemonic Signal description
1, 4, 6, 9 NC NO CONNECTION
2 TXD TRANSMITTED DATA RS232 serial data output signal
3 RXD RECEIVED DATA RS232 serial data input signal
5 GND GROUND
7 RTS READY TO SEND Active-positive RS232 input signal
8 CTS CLEAR TO SEND Active-positive RS232 output signal
Table 6-3. RS232 DBGU Connector J10 Signal Descriptions
Pin Mnemonic Signal description
1, 4, 6, 7, 8, 9 NC NO CONNECTION
2 TXD TRANSMITTED DATA RS232 serial data output signal
3 RXD RECEIVED DATA RS232 serial data input signal
5 GND GROUND
Connectors
AT91SAM9M10-G45-EK User Guide 6-3
6495B–ATARM–21-Apr-10
6.4 Ethernet
Connector J15 is the RJ-45 Ethernet Connector.
Figure 6-4. Ethernet RJ45 Connector J15
6.5 USB Host
Connector J12 is the USB Host connector.
Figure 6-5. USB Host type A connector J12
Table 6-4. Ethernet RJ45 Connector J15 Signal Descriptions
Pin Mnemonic Pin Mnemonic
1 TxData+ DIFFERENTIAL OUTPUT PLUS 2 Txdata- DIFFERENTIAL OUTPUT MINUS
3 RxData+ DIFFERENTIAL INPUT PLUS 4 Shield
5 Shield 6 RxData- DIFFERENTIAL INPUT MINUS
7 Shield 8 Shield
Table 6-5. USB Host Type A Connector J12 Signal Descriptions
Pin Mnemonic Signal description
1 Vbus 5v power
2 DM Data minus
3 DP Data plus
4 Gnd Ground
5 Shield Shield
Connectors
6-4 AT91SAM9M10-G45-EK User Guide
6495B–ATARM–21-Apr-10
6.6 USB Host/Device
Connector J14 is the USB Host/Device connector.
Figure 6-6. USB Host/Device Micro AB connector J14
6.7 JTAG Debugging Connector
Connector J13 is the JTAG/ICE connector.
A SAM-ICE connector is a 20-way Insulation Displacement Connector (IDC) keyed box header (2.54 mm
male) that mates with IDC sockets mounted on a ribbon cable.
Figure 6-7. JTAG/ICE Connector J13
Table 6-6. USB Host/Device MicroAB Connector J14 Signal Descriptions
Pin Mnemonic Signal description
1 Vbus 5v power
2 DM Data minus
3 DP Data plus
4 ID On the Go Identification
5 Gnd Ground

Product specificaties

Merk: Microchip
Categorie: Niet gecategoriseerd
Model: SAM9M10-G45-EK

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