Microchip PIC32MX440F256H Handleiding

Microchip Niet gecategoriseerd PIC32MX440F256H

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© 2011 Microchip Technology Inc. DS61126F-page 27-1
USB On-The-Go
(OTG)
27
Section 27. USB On-The-Go (OTG)
HIGHLIGHTS
This section of the manual contains the following major topics:
27.1 Introduction .................................................................................................................. 27-2
27.2 Control Registers ......................................................................................................... 27-4
27.3 Operation ................................................................................................................... 27-36
27.4 Host Mode Operation................................................................................................. 27-51
27.5 Interrupts.................................................................................................................... 27-59
27.6 I/O Pins ...................................................................................................................... 27-62
27.7 Operation in Debug and Power-Saving Modes.......................................................... 27-64
27.8 Effects of a Reset....................................................................................................... 27-66
27.9 Related Application Notes.......................................................................................... 27-67
PIC32 Family Reference Manual
DS61126F-page 27-2 © 2011 Microchip Technology Inc.
27.1 INTRODUCTION
The PIC32 USB OTG module includes the following features:
• USB Full-Speed Support for Host and Device
• Low-Speed Host Support
• USB On-The-Go (OTG) Support
• Integrated Signaling Resistors
• Integrated Analog Comparators for VBUS Monitoring
• Integrated USB Transceiver
• Transaction Handshaking Performed by Hardware
• Endpoint Buffering Anywhere in System RAM
• Integrated Bus Master to Access System RAM and Flash
• USB OTG module does not require the PIC32 DMA module for its operation
The USB OTG module contains analog and digital components to provide a USB 2.0 full-speed
and low-speed embedded host, full-speed device, or OTG implementation with a minimum of
external components. This module in Host mode is intended for use as an embedded host and
therefore does not implement a UHCI or OHCI controller.
The USB OTG module consists of the clock generator, the USB voltage comparators, the trans-
ceiver, the Serial Interface Engine (SIE), a dedicated USB Bus Master, pull-up and pull-down
resistors and the register interface. A block diagram of the USB OTG module is presented in
Figure 27-1.
The clock generator provides the 48 MHz clock, which is required for USB full-speed and
low-speed communication. The voltage comparators monitor the voltage on the VBUS pin to
determine the state of the bus. The transceiver provides the analog translation between the USB
bus and the digital logic. The SIE is a state machine that transfers data to and from the endpoint
buffers, and generates the hardware protocol for data transfers. The USB Bus Master transfers
data between the data buffers in RAM and the SIE. The integrated pull-up and pull-down resistors
eliminate the need for external signaling components. The register interface allows the CPU to
configure and communicate with the module.
Note: This family reference manual section is meant to serve as a complement to device
data sheets. Depending on the device variant, this manual section may not apply to
all PIC32 devices.
Please consult the note at the beginning of the “USB On-The-Go (OTG)” chapter
in the current device data sheet to check whether this document supports the device
you are using.
Device data sheets and family reference manual sections are available for
download from the Microchip Worldwide Web site at: http://www.microchip.com
IMPORTANT: The implementation and use of the USB specifications, as well as other
third-party specifications or technologies, may require licensing; including,
but not limited to, USB Implementers Forum, Inc. (also referred to as
USB-IF). The user is fully responsible for investigating and satisfying any
applicable licensing obligations.
© 2011 Microchip Technology Inc. DS61126F-page 27-3
Section 27. USB On-The-Go (OTG)
USB On-The-Go
(OTG)
27
Figure 27-1: PIC32 USB OTG Interface Diagram
Note 1: PB clock is only available on this pin for select EC modes.
2: Pins can be used as digital inputs when USB is not enabled.
3: This bit field is contained in the OSCCON register.
4: This bit field is contained in the OSCTRM register.
5: USB PLL UFIN requirements: 4 MHz ≤ UFIN ≤ 5 MHz.
6: This bit field is contained in the DEVCFG2 register.
7: A 48 MHz clock is required for proper USB operation.
8: Pins can be used as GPIO when the USB OTG module is disabled.
9: Pin is pulled high internally when USB OTG module is enabled.
OSC1
OSC2
Primary Oscillator
8 MHz Typical
FRC
Oscillator
TUN<5:0>(4)
PLL
48 MHz USB Clock(7)
Div x
UPLLEN(6)
(PBOUT)(1)
UFRCEN(3)
(POSC)
FUPLLIDIV(6)
UFIN(5)
Div 2
VUSB
D+(2)
D-(2)
ID(8,9)
VBUS
Transceiver
SIE
VBUSON(8)
Comparators
USB
SRP Charge
SRP Discharge
Registers
and
Control
Interface
Transceiver Power 3.3V
To Clock Generator for Core and Peripherals
Sleep or Idle
Sleep
USBEN
USB Suspend
CPU Clock Not POSC
USB OTG Module
Voltage
System
RAM
USB Suspend
Full-Speed Pull-up
Host Pull-down
Low-Speed Pull-up
Host Pull-down
ID Pull-up
Bus
Master
24xPLL

Product specificaties

Merk: Microchip
Categorie: Niet gecategoriseerd
Model: PIC32MX440F256H

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