Microchip PIC24HJ64GP210 Handleiding

Microchip Niet gecategoriseerd PIC24HJ64GP210

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dsPIC33F/PIC24H

1.0 DEVICE OVERVIEW

This document defines the programming specification

for the dsPIC33F 16-bit Digital Signal Controller (DSC)

and PIC24H 16-bit Microcontroller (MCU) families. This

programming specification is required only for those

developing programming support for the dsPIC33F/

PIC24H family. Customers using only one of these

devices should use development tools that already

provide support for device programming.

Topics covered include:

1.0 Device Overview ......................................................... 1

2.0 Programming Overview of the dsPIC33F/PIC24H ...... 1

3.0 Device Programming – Enhanced ICSP ..................... 8

4.0 The Programming Executive ..................................... 19

5.0 Device Programming – ICSP .................................... 28

6.0 Programming the Programming Executive

to Memory ................................................................. 45

7.0 Device ID................................................................... 50

8.0 AC/DC Characteristics and Timing Requirements .... 54

Appendix A: Hex File Format .............................................. 57

Appendix B: Device ID Register Silicon Errata Addendum . 58

Appendix C: Diagnostic and Calibration Registers ............. 59

Appendix D: Checksum Computation ................................. 61

Appendix E: Revision History.............................................. 74

2.0 PROGRAMMING OVERVIEW

OF THE dsPIC33F/PIC24H

There are two methods of programming the dsPIC33F/

PIC24H family of devices discussed in this

programming specification. They are:

• In-Circuit Serial Programming™ (ICSP™)

programming capability

• Enhanced In-Circuit Serial Programming

The ICSP programming method is the most direct

method to program the device; however, it is also the

slower of the two methods. It provides native, low-level

programming capability to erase, program and verify

the chip.

The Enhanced ICSP protocol uses a faster method that

takes advantage of the programming executive, as

illustrated in . The programming executiveFigure 2-1

provides all the necessary functionality to erase,

program and verify the chip through a small command

set. The command set allows the programmer to

program the dsPIC33F/PIC24H Programming

Specification devices without having to deal with the

low-level programming protocols of the chip.

FIGURE 2-1: PROGRAMMING SYSTEM

OVERVIEW FOR

ENHANCED ICSP™

This specification is divided into major sections that

describe the programming methods independently.

Section 3.0 “Device Programming – Enhanced

ICSP” describes the Enhanced ICSP method.

Section 5.0 “Device Programming – ICSP”

describes the ICSP method.

2.1 Power Requirements

All devices in the dsPIC33F/PIC24H family are dual

voltage supply designs: one supply for the core and

another for the peripherals and I/O pins. A regulator is

provided on-chip to alleviate the need for two external

voltage supplies.

All of the dsPIC33F/PIC24H devices power their core

digital logic at a nominal 2.5V. To simplify system

design, all devices in the dsPIC33F/PIC24H

Programming Specification family incorporate an

on-chip regulator that allows the device to run its core

logic from VDD.

The regulator provides power to the core from the other

VDD pins. A low-ESR capacitor (such as tantalum) must

be connected to the VCAP pin (Figure 2-2). This helps

to maintain the stability of the regulator. The

specifications for core voltage and capacitance are

listed in Section 8.0 “AC/DC Characteristics and

Timing Requirements”.

dsPIC33F/PIC24H

Programmer Programming

Executive

On-Chip Memory

dsPIC33F/PIC24H Flash Programming Specification

dsPIC33F/PIC24H PROGRAMMING SPECIFICATION

FIGURE 2-2: CONNECTIONS FOR THE

ON-CHIP REGULATOR

2.2 Program Memory Write/Erase

Requirements

The program Flash memory on the dsPIC33F/PIC24H

has a specific write/erase requirement that must be

adhered to, for proper device operation. The rule is that

any given word in memory must not be written without

first erasing the page in which it is located. Thus, the

easiest way to conform to this rule is to write all the data

in a programming block within one write cycle. The

programming methods specified in this document

comply with this requirement.

2.3 Pins Used During Programming

The pins that are used for programming are listed in

Table 2-1.

TABLE 2-1: PINS USED DURING PROGRAMMING

Note 1: These are typical operating voltages. Refer

to TABLE 8-1: “AC/DC Characteristics

and Timing Requirements” for the full

operating ranges of VDD and VCAP.

2: It is important for the low-ESR capacitor to

be placed as close as possible to the V

CAP

pin.

VDD

VCAP

VSS

dsPIC33F/PIC24H

CEFC

3.3V

Note: A program memory word can be

programmed twice before an erase, but

only if (a) the same data is used in both

program operations or (b) bits containing

‘1’ are set to ‘0’ but no ‘0’ is set to ‘1’.

Note: Refer to the specific device data sheet for

complete pin diagrams of the dsPIC33F/

PIC24H devices.

Pin Name

During Programming

Pin Name Pin Type Pin Description

MCLR MCLR P Programming Enable

VDD and AVDD(1) VDD P Power Supply

VSS and AVSS(1) VSS P Ground

VCAP CAPV P CPU Logic Filter Capacitor Connection

PGEC1 PGEC1 I Primary Programming Pin Pair: Serial Clock

PGED1 PGED1 I/O Primary Programming Pin Pair: Serial Data

PGEC2 PGEC2 I Secondary Programming Pin Pair: Serial Clock

PGED2 PGED2 I/O Secondary Programming Pin Pair: Serial Data

PGEC3 PGEC3 I Tertiary Programming Pin Pair: Serial Clock

PGED3 PGED3 I/O Tertiary Programming Pin Pair: Serial Data

Legend: I = Input O = Output P = Power

Note 1: All power supply and ground pins must be connected, including analog supplies (AVDD) and ground

(AV ).SS

dsPIC33F/PIC24H PROGRAMMING SPECIFICATION

2.4 Memory Map

The program memory map extends from 0x0 to

0xFFFFFE. Code storage is located at the base of the

memory map and supports up to 88K instructions

(about 256 Kbytes). Table 2-2 shows the program

memory size and number of erase and program blocks

present in each device variant. Each erase block or

page contains 512 instructions and each program block

or row, contains 64 instructions.

Locations 0x800000 through 0x800FFE are reserved

for executive code memory. This region stores the

programming executive and the debugging

executive. The programming executive is used for

device programming and the debug executive is

used for in-circuit debugging. This region of memory

cannot be used to store user code.

Locations 0xF80000 through 0xF80017 are reserved

for the device Configuration registers.

Locations 0xFF0000 and 0xFF0002 are reserved for

the Device ID Word registers. These bits can be used

by the programmer to identify which device type is

being programmed. They are described in Section 7.0

“Device ID”. The Device ID registers read out

normally, even after code protection is applied.

Figure 2-3 illustrates the memory map for the

dsPIC33F/PIC24H family variants.

TABLE 2-2: CODE MEMORY SIZE

dsPIC33F/PIC24H Device

User Memory Address

Limit

(Instruction Words)

Write Blocks Erase Blocks

Executive Memory

Address Limit

(Instruction Words)

dsPIC33FJ06GS101 0x000FFE (2K) 32 4 0x8007FE (1K)

dsPIC33FJ06GS102 0x000FFE (2K) 32 4 0x8007FE (1K)

dsPIC33FJ06GS202 0x000FFE (2K) 32 4 0x8007FE (1K)

dsPIC33FJ16GS402 0x002BFE (6K) 88 11 0x8007FE (1K)

dsPIC33FJ16GS404 0x002BFE (6K) 88 11 0x8007FE (1K)

dsPIC33FJ16GS502 0x002BFE (6K) 88 11 0x8007FE (1K)

dsPIC33FJ16GS504 0x002BFE (6K) 88 11 0x8007FE (1K)

dsPIC33FJ12GP201 0x001FFE (4K) 64 8 0x8007FE (1K)

dsPIC33FJ12GP202 0x001FFE (4K) 64 8 0x8007FE (1K)

dsPIC33FJ16GP304 0x002BFE (6K) 88 11 0x800FFE (2K)

dsPIC33FJ32GP202 0x0057FE (11K) 176 22 0x800FFE (2K)

dsPIC33FJ32GP204 0x0057FE (11K) 176 22 0x800FFE (2K)

dsPIC33FJ32GP302 0x0057FE (11K) 176 22 0x800FFE (2K)

dsPIC33FJ32GP304 0x0057FE (11K) 176 22 0x800FFE (2K)

dsPIC33FJ64GP202 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP204 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP206 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP306 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP310 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP706 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP708 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP710 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP802 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ64GP804 0x00ABFE (22K) 344 43 0x800FFE (2K)

dsPIC33FJ128GP202 0x0157FE (44K) 688 86 0x800FFE (2K)

dsPIC33FJ128GP204 0x0157FE (44K) 688 86 0x800FFE (2K)

dsPIC33FJ128GP206 0x0157FE (44K) 688 86 0x800FFE (2K)

dsPIC33FJ128GP306 0x0157FE (44K) 688 86 0x800FFE (2K)

dsPIC33FJ128GP310 0x0157FE (44K) 688 86 0x800FFE (2K)

dsPIC33FJ128GP706 0x0157FE (44K) 688 86 0x800FFE (2K)

dsPIC33FJ128GP708 0x0157FE (44K) 688 86 0x800FFE (2K)

Product specificaties

Merk:	Microchip
Categorie:	Niet gecategoriseerd
Model:	PIC24HJ64GP210

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