Microchip PIC24EP512MC206 Handleiding

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© 2013 Microchip Technology Inc. DS70005131A-page 1
Oscillator Module
HIGHLIGHTS
This section of the manual contains the following major topics:
1.0 Introduction ....................................................................................................................... 2
2.0 CPU Clocking.................................................................................................................... 5
3.0 Oscillator Configuration Registers .................................................................................... 6
4.0 Special Function Registers ............................................................................................... 9
5.0 Primary Oscillator (POSC).............................................................................................. 21
6.0 Internal Fast RC (FRC) Oscillator................................................................................... 25
7.0 Phase-Locked Loop (PLL) .............................................................................................. 26
8.0 Secondary Oscillator (SOSC) ......................................................................................... 31
9.0 Low-Power RC (LPRC) Oscillator................................................................................... 32
10.0 Auxiliary Oscillator .......................................................................................................... 33
11.0 Auxiliary Phase-Locked Loop (APLL) ............................................................................. 34
12.0 Auxiliary PLL (x16).......................................................................................................... 37
13.0 Fail-Safe Clock Monitor (FSCM)..................................................................................... 39
14.0 Clock Switching............................................................................................................... 40
15.0 Two-Speed Start-up ........................................................................................................ 44
16.0 Reference Clock Output.................................................................................................. 44
17.0 Linear Feedback Shift Register....................................................................................... 44
18.0 Register Maps................................................................................................................. 45
19.0 Related Application Notes............................................................................................... 46
20.0 Revision History.............................................................................................................. 47
dsPIC33/PIC24 Family Reference Manual
DS70005131A-page 2 © 2013 Microchip Technology Inc.
1.0 INTRODUCTION
The dsPIC33/PIC24 family oscillator system includes these characteristics:
• External and internal oscillator sources
• On-chip Phase-Locked Loop (PLL) to boost internal operating frequency on select internal
and external oscillator sources
• Auxiliary PLL (APLL) clock generator to boost operating frequency for ADC and PWM
• Auxiliary Oscillator (AOSC) and Auxiliary PLL Clock (ACLK) generator for USB
• Doze mode for system power savings
• Scalable Reference Clock Output (REFCLKO)
• On-the-fly clock switching between various clock sources
• Linear Feedback Shift Register (LFSR) to generate pseudorandom data
• Fail-Safe Clock Monitoring (FSCM) that detects clock failure and permits safe application
recovery or shutdown
A block diagram of the dsPIC33/PIC24 family oscillator system is shown in Figure 1-1.
Note: This family reference manual section is meant to serve as a complement to device
data sheets. This document applies to all dsPIC33/PIC24 family devices. However,
some features in this document will not apply to all devices.
Please consult the note at the beginning of the “Oscillator Configuration” chapter
in the current device data sheet to check whether this document supports the
device you are using.
Device data sheets and family reference manual sections are available for
download from the Microchip Worldwide Web site at: http://www.microchip.com.
© 2013 Microchip Technology Inc. DS70005131A-page 3
Oscillator Module
Figure 1-1: Oscillator System Block Diagram
XTPLL, HSPLL,
XT, HS, EC
FRCDIV<2:0>
WDT, PWRT,
FRCDIVN
FRCDIV16
ECPLL, FRCPLL (F
PLLO
)
NOSC<2:0> FNOSC<2:0>
Reset
FRC
Oscillator
LPRC
Oscillator
DOZE<2:0>
S3
S1
S2
S1/S3
S7
S6
FRC
LPRC
S0
S5
÷ 16
Clock Switch
0b000
Clock Fail
TUN<5:0>
PLL(1) FCY(3)
FOSC
FRCDIV
DOZE
Note 1: See Figure 7-1 for the source of the FVCO signal.
2: If the oscillator is used with XT or HS modes, an external parallel resistor with the value of 1 MΩ must be connected.
3: The term, FP, refers to the clock source for all the peripherals, while FCY (or MIPS) refers to the clock source for the CPU.
Throughout this document, FCY and FP are used interchangeably, except in the case of Doze mode. FP and FCY will be different when
Doze mode is used in any ratio other than 1:1.
FSCM
POSCCLK
FRCCLK
FVCO(1)
OSC2
OSC1
Primary Oscillator (POSC)
R(2)
POSCMD<1:0>
FP(3)
REFERENCE CLOCK OUTPUT
POSCCLK
ROSEL
FOSC
÷ N
RPn
REFCLKO
RODIV<3:0>
S4
SOSCO
Secondary Oscillator (SOSC)
POSCMD<1:0>
LPOSCEN
SOSCI
Auxiliary
Oscillator (AOSC)
ENAPLL
To Auxiliary Clock Generator
SOSC
÷ 2

Product specificaties

Merk: Microchip
Categorie: Niet gecategoriseerd
Model: PIC24EP512MC206

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